CAJ | 학술논문

中国散裂中子源（CSNS）快循环同步环（RCS）上需要束流位置检测器（BPM）来检测束流位置偏移。论文介绍该系统中读出电路的设计和实现。设计BPM读出电路的最大挑战就是接收和处理大动态范围（5．8 mV～32 V）和变化宽度（80～500 ns）的探头引出信号。文中介绍的模拟电路，采用由模拟运放和模拟开关构成可变增益放大器的结构，能够接收和处理该探头引出信号。另外，对于一个BPM系统，精确的实时束流位置检测是必须的。本设计基于FPGA，开发了计算逐束团位置信息和束流闭轨模式位置信息的实时算法。此外，设计实现了工程所需的各种功能，包括30 s逐束团位置缓存、基于VME总线的数据读出和控制、FPGA程序的在线加载等。初步测试显示，在最小信号10 mV时，逐束团位置分辨是0．9 mm，束流闭轨模式位置分辨为50μm。
중국산렬중자원（CSNS）쾌순배동보배（RCS）상수요속류위치검측기（BPM）래검측속류위치편이。논문개소해계통중독출전로적설계화실현。설계BPM독출전로적최대도전취시접수화처리대동태범위（5．8 mV～32 V）화변화관도（80～500 ns）적탐두인출신호。문중개소적모의전로，채용유모의운방화모의개관구성가변증익방대기적결구，능구접수화처리해탐두인출신호。령외，대우일개BPM계통，정학적실시속류위치검측시필수적。본설계기우FPGA，개발료계산축속단위치신식화속류폐궤모식위치신식적실시산법。차외，설계실현료공정소수적각충공능，포괄30 s축속단위치완존、기우VME총선적수거독출화공제、FPGA정서적재선가재등。초보측시현시，재최소신호10 mV시，축속단위치분변시0．9 mm，속류폐궤모식위치분변위50μm。
It introduces the design and implementation of the BPM electronics for CSNS RCS .The challenges of designing the BPM electronics are to acquire and process the signal with large dynamic range (5.8 mV~32V) and changing width (80ns to 500 ns).The analog circuit described in this paper , which is constructed of single-stage amplifier and analog switch , can cover the input signal with large dynamic range .Besides , it is indis-pensable that the BPM electronics is able to calculate the position information .The algorithm developed in FP-GA is able to make Bunch -by-Bunch position calculation and Closed Orbit position calculation in real time . In addition , many other functions useful for CSNS project have been implemented in this work , including the storage of the TBT position information for 30s, reading and controlling via VME bus , on-line configuration of FPGA.Preliminary test results show that the resolution of Bunch -by-Bunch position is 0.9mm when the in-put signal is 10 mV and the resolution of Closed Orbit position is 50 μm.