基于 DSP builder 与 FPGA 的数字脉冲处理算法研究
기우 DSP builder 여 FPGA 적수자맥충처리산법연구
Development of the Digital Pulse Processing Algorithms Based on DSP Builder and FPGA Techniques
  • 万方数据
    核电子学与探测技术 핵전자학여탐측기술
    NUCLEAR ELECTRONICS & DETECTION TECHNOLOGY
    2014年 2期 148-151 ,共4页

    李玉英%梁昊%曾雅丹%刘汉超

    리옥영%량호%증아단%류한초

    数字恒比定时(dCFD)%DSP builder%现场可编程门阵列%数字脉冲处理(DPP) 數字恆比定時(dCFD)%DSP builder%現場可編程門陣列%數字脈遲處理(DPP)
    수자항비정시(dCFD)%DSP builder%현장가편정문진렬%수자맥충처리(DPP)
    digital constant fraction discrimination%DSP builder%FPGA%digital pulse processing
    研究了基于DSP builder与FPGA的数字脉冲处理算法，设计了一种基于数字脉冲处理技术的数字实时时间谱仪。谱仪数字恒比定时（ dCFD）算法部分最终全部在FPGA中实现，简化了电路。并组建了一套测量22 Na放射源的数字化正电子符合谱仪，对其进行测量得到该系统能量分辨达到3．90％，时间分辨达到157．6 ps，高于传统TDC测得的时间分辨率。
    연구료기우DSP builder여FPGA적수자맥충처리산법，설계료일충기우수자맥충처리기술적수자실시시간보의。보의수자항비정시（ dCFD）산법부분최종전부재FPGA중실현，간화료전로。병조건료일투측량22 Na방사원적수자화정전자부합보의，대기진행측량득도해계통능량분변체도3．90％，시간분변체도157．6 ps，고우전통TDC측득적시간분변솔。
    A digital real-time spectrometer based on DSP Builder and FPGA is developed .Spectrometer digit-al constant fraction discrimination ( DCFD) part of the algorithm ultimately is implemented in one FPGA to sim-plify the circuit .In the experiment with 22 Na source digitized positron annihilation coincident spectrometer , The energy resolution is 3.90%, and the timing resolution is 157.6ps, which is better than traditional TDC .
    원문보기 원문다운로드 사이트로이동
저자의 최근 논문