CAJ | 학술논문

针对集成电路芯片被植入硬件木马后带来的安全问题，提出一种基于概率签名的硬件木马检测技术。通过逻辑功能检测，采用随机算法构建芯片电路(布尔函数)的概率签名，作为唯一的识别符模板，当被测电路的签名与模板不匹配时发出告警。设计全加器和AES加密2款电路，植入常见硬件木马并进行攻击实验，对这2种电路的原始电路以及植入硬件木马后电路的概率签名是否发生改变进行理论分析与研究。采用统计学参数估计法在 FPGA 平台进行实验，结果表明，该概率签名技术能检测出一般规模组合逻辑电路中植入的硬件木马，置信度达到95%。
침대집성전로심편피식입경건목마후대래적안전문제，제출일충기우개솔첨명적경건목마검측기술。통과라집공능검측，채용수궤산법구건심편전로(포이함수)적개솔첨명，작위유일적식별부모판，당피측전로적첨명여모판불필배시발출고경。설계전가기화AES가밀2관전로，식입상견경건목마병진행공격실험，대저2충전로적원시전로이급식입경건목마후전로적개솔첨명시부발생개변진행이론분석여연구。채용통계학삼수고계법재 FPGA 평태진행실험，결과표명，해개솔첨명기술능검측출일반규모조합라집전로중식입적경건목마，치신도체도95%。
Trojan circuits can bypass traditional defensive techniques as they occupy a layer below the entire software stack. This paper proposes a hardware trojan detection technology based on probabilistic signature. Based on logic detection technology, using random and hypothesis algorithm, this paper constructs the probability signature of circuits(Boolean functions), as the unique identifier template. When the signature of circuit under test does not match the template, an alarm is launched. It designs two circuits that implement full adder and AES encryption, and then they are implanted with common hardware Trojan. It makes in-depth theoretical analysis and research on whether the probabilistic signature of the circuits implanted with hardware Trojans is changed in comparison with the two kinds of original circuits. It tests the circuits based on FPGA platform via probabilistic method. As a result, it is verified that based on the probability signature, it can easily achieve a 95%level of confidence on the detection of hardware Trojans implanted into the combinational logic circuits.