中国电子商情：通信市场
中國電子商情：通信市場
중국전자상정：통신시장
2012年
2期
32-37
,共6页
DDS%PLL%多环结构%建模%Simulink仿真
DDS%PLL%多環結構%建模%Simulink倣真
DDS%PLL%다배결구%건모%Simulink방진
DDS%PLL%multi-loop system: modeling%Simulink-simulation
以DDS和PLL基本原理为基础分析了一种DDS和PLL组合结构的多环频率合成器的设计方法。以PLLA产生大步进频率，采用DDS激励PLLB结构产生精细频率，两者结合后通过PLLC改善输出信号的相位噪声和杂散性能。使用Simulink中的各种模块对DDS、PLL和DDS激励PLL的多环系统进行建模和仿真。仿真结果表明，系统启动大约4μS后，频率锁定。通过配置不同参数，可得到输出带宽内的任一频率，频率分辨率远小于1Hz
以DDS和PLL基本原理為基礎分析瞭一種DDS和PLL組閤結構的多環頻率閤成器的設計方法。以PLLA產生大步進頻率，採用DDS激勵PLLB結構產生精細頻率，兩者結閤後通過PLLC改善輸齣信號的相位譟聲和雜散性能。使用Simulink中的各種模塊對DDS、PLL和DDS激勵PLL的多環繫統進行建模和倣真。倣真結果錶明，繫統啟動大約4μS後，頻率鎖定。通過配置不同參數，可得到輸齣帶寬內的任一頻率，頻率分辨率遠小于1Hz
이DDS화PLL기본원리위기출분석료일충DDS화PLL조합결구적다배빈솔합성기적설계방법。이PLLA산생대보진빈솔，채용DDS격려PLLB결구산생정세빈솔，량자결합후통과PLLC개선수출신호적상위조성화잡산성능。사용Simulink중적각충모괴대DDS、PLL화DDS격려PLL적다배계통진행건모화방진。방진결과표명，계통계동대약4μS후，빈솔쇄정。통과배치불동삼수，가득도수출대관내적임일빈솔，빈솔분변솔원소우1Hz
Based on the basic theory about DDS and PLL,a design method of a multi-loop frequency synthesizer including the structure of DDS hybrid PLL is analysed.Its operation progress contains that the PLLA generates the bigger step frequency,and at the same time the structure of DDS hybrid PLL generates the less frequency,after mixing the two signals and filtering,the output signal improves the phase noise and stray within the help of PLLC.With the using of a variety of blocks in Simulink,it succeeds modeling and simulating the DDS,PLL,DDS hybrid PLL and the whole system.The results show that when the start time is about 4 μs,the output is locked.From the different parameters configuration,the different frequency can be obtained,and frequency resolution ratio is far less than lHz.
