现代电子技术
現代電子技術
현대전자기술
MODERN ELECTRONICS TECHNIQUE
2014年
7期
147-150
,共4页
PWM%Class D%电流反馈%迟滞比较器
PWM%Class D%電流反饋%遲滯比較器
PWM%Class D%전류반궤%지체비교기
PWM%Class D%current feedback%hysteresis comparator
设计一款可用于Class D的比较器。在考虑抗噪能力和分辨率的情况下，引入2路电流反馈，提高抗噪能力，从而可以提高分辨率。采用HHNEC BCD035工艺对该调制器进行电路级设计并用Cadence仿真，该电路可抑制输出电压的错误跳变，失调电压为0.2 mV，增益为38.42 dB，3 dB带宽达到20 MHz，满足高速率要求。
設計一款可用于Class D的比較器。在攷慮抗譟能力和分辨率的情況下，引入2路電流反饋，提高抗譟能力，從而可以提高分辨率。採用HHNEC BCD035工藝對該調製器進行電路級設計併用Cadence倣真，該電路可抑製輸齣電壓的錯誤跳變，失調電壓為0.2 mV，增益為38.42 dB，3 dB帶寬達到20 MHz，滿足高速率要求。
설계일관가용우Class D적비교기。재고필항조능력화분변솔적정황하，인입2로전류반궤，제고항조능력，종이가이제고분변솔。채용HHNEC BCD035공예대해조제기진행전로급설계병용Cadence방진，해전로가억제수출전압적착오도변，실조전압위0.2 mV，증익위38.42 dB，3 dB대관체도20 MHz，만족고속솔요구。
A comparator used in a Class D audio amplifier was designed. Taking the anti-noise capacity and resolution into account,two current-feedback subcircuits are adopted in the design to improve the anti-noise capacity and resolution at the same time. HHNEC BCD035 process is used for circuit design of the modulator and Cadence is for its simulation. The result shows that the circuit can restrain the mistaken voltage jump,the offset voltage can reach 0.2 mV,the gain of pre-amp is 38.42 dB, and the 3 dB bandwidth can reach 20 MHz to satisfy the requirement of high speed.
