CAJ | 학술논문

为实现RSA算法中的模幂运算，针对面积、速率以及电路的复杂度问题，提出了一种基于 FPGA实现的模幂运算电路。使用蒙哥马力算法以及L -R算法实现了模幂运算，并通过基于verilog硬件描述语言，将电路实现。结果表明，该方案实现的模幂运算的电路结构简单，资源利用率高，且能达到较高的性能。
위실현RSA산법중적모멱운산，침대면적、속솔이급전로적복잡도문제，제출료일충기우 FPGA실현적모멱운산전로。사용몽가마력산법이급L -R산법실현료모멱운산，병통과기우verilog경건묘술어언，장전로실현。결과표명，해방안실현적모멱운산적전로결구간단，자원이용솔고，차능체도교고적성능。
In order to achieve the modular exponentiation in RSA algorithm ,the article brings forth a modu-lar exponentiation circuit so as to solve complicated problems such as area ,speed and circuit .The Mont-gomery algorithm as well as L-R algorithm is utilized to realize a modular exponentiation ,and the circuit is realized based on verilog language .The results show that circuit realized through exponentiation is of sim-ple structure ,high resource utilization and better performance .