CAJ | 학술논문

当前微小卫星的星载计算机与运载计算机多分别采用不同结构的计算机系统设计,导致资源浪费和运载计算机的可靠性较弱。文章提出了一种微小卫星一体化计算机的设计,即采用三机异构备份的设计方案。在发射运载阶段,以数字信号处理器（DSP）为核心的运载计算机作为主机,以高性能FPGA为核心的时变计算机作为备机;在在轨运行阶段,以ERC32处理器为核心的卫星平台计算机作为主机,时变计算机经重构后作为备机。此设计不仅提高了运载计算机的可靠性,而且对卫星平台电子系统在能源、热控、遥测遥控、有效载荷、姿态轨道控制等方面的综合管理能力也有全面提升,并且还具有灵活的扩展性和较强的适应性。
당전미소위성적성재계산궤여운재계산궤다분별채용불동결구적계산궤계통설계,도치자원낭비화운재계산궤적가고성교약。문장제출료일충미소위성일체화계산궤적설계,즉채용삼궤이구비빈적설계방안。재발사운재계단,이수자신호처리기（DSP）위핵심적운재계산궤작위주궤,이고성능FPGA위핵심적시변계산궤작위비궤;재재궤운행계단,이ERC32처리기위핵심적위성평태계산궤작위주궤,시변계산궤경중구후작위비궤。차설계불부제고료운재계산궤적가고성,이차대위성평태전자계통재능원、열공、요측요공、유효재하、자태궤도공제등방면적종합관리능력야유전면제승,병차환구유령활적확전성화교강적괄응성。
To satisfy different requirements, different computer systems are adopted for on-board computer for launch vehicle and satellite. To overcome the resource waste and low reliability for the design method, a new design method of on-board integrated computer for satellite is presented. A hybrid tri-redundant system is designed. At the launching phase, the computer for launch vehicle based on digital signal processor （DSP） acts as a host processor, while the time-varying computer based on FPGA is used as a spare. The satellite platform computer based on ERC32 acts as a host computer, and the time-varying computer is used as a spare after reconfiguration in orbit. The reliability for the on-board computer for launch vehicle is improved. The comprehen- sive management for the on-board computer for satellite is advanced. The expansibility and adaptability is increased.