CAJ | 학술논문

在超大规模集成电路（VLSI）电路设计中，两点之间的等效电阻是设计人员所要考虑的重要参数。随着深亚微米工艺的广泛应用，版图形体日趋复杂，现有版图电阻提取工具的计算方法已难满足精度要求。本文提出了对于不同种类的三维复杂形体，其电阻网络采用不同的提取方法。对于简单形体采用解析法，对于复杂形体通过三维边界元计算方法提取版图电阻。基于提取的电阻网络，通过求解电路方程计算两点之间的等效电阻。实验表明，此方法对于实际电路设计中任意两点等效电阻计算，相比较于现有工具的方法具有计算速度快，计算精度高，计算效果好等特点。
재초대규모집성전로（VLSI）전로설계중，량점지간적등효전조시설계인원소요고필적중요삼수。수착심아미미공예적엄범응용，판도형체일추복잡，현유판도전조제취공구적계산방법이난만족정도요구。본문제출료대우불동충류적삼유복잡형체，기전조망락채용불동적제취방법。대우간단형체채용해석법，대우복잡형체통과삼유변계원계산방법제취판도전조。기우제취적전조망락，통과구해전로방정계산량점지간적등효전조。실험표명，차방법대우실제전로설계중임의량점등효전조계산，상비교우현유공구적방법구유계산속도쾌，계산정도고，계산효과호등특점。
In VLSI IC design, how to get the equivalent resistance between any two points in layout is important in order to keep the correct IC circuit function and performance. With widely usage of deep submiero process technology, the layout geometries become more complex so that traditional resistance estimation method can no longer provide sufficient accuracy. This paper presents method for the point to point resistance computation for differed geometry type. It uses analytical and integration method for manhattan geometry to extract the resistance network. The equivalent resistance then can be obtained by solving the circuit equation. For the complex geometry, it uses Boundary Element Method （ BEM ） to solve the 3D Laplace equation for getting the equivalent resistance. For the real layout data, the result shows that compared with existed methods the proposed method is much faster, more accurate and better performance.