电子设计工程
電子設計工程
전자설계공정
ELECTRONIC DESIGN ENGINEERING
2012年
13期
135-137,141
,共4页
第二代电流传输器%电流模式积分器%低压%自偏置%轨对轨%宽带
第二代電流傳輸器%電流模式積分器%低壓%自偏置%軌對軌%寬帶
제이대전류전수기%전류모식적분기%저압%자편치%궤대궤%관대
CCⅡ%current-mode integrator%low-voltage%self-biased%rail-to-rail%wideband
介绍了一种基于低压、宽带、轨对轨、自偏置CMOS第二代电流传输器(CCⅡ)的电流模式积分器电路,能广泛应用于无线通讯、射频等高频模拟电路中。通过采用0.18μm工艺参数,进行Hspice仿真,结果表明:电流传输器电压跟随的线性范围为-1.04~1.15V,电流跟随的线性范围为-9.02~6.66mA,iX/iZ的-3dB带宽为1.6GHz。输出信号的幅度以20dB/decade的斜率下降,相位在低于3MHz的频段上保持在90°。
介紹瞭一種基于低壓、寬帶、軌對軌、自偏置CMOS第二代電流傳輸器(CCⅡ)的電流模式積分器電路,能廣汎應用于無線通訊、射頻等高頻模擬電路中。通過採用0.18μm工藝參數,進行Hspice倣真,結果錶明:電流傳輸器電壓跟隨的線性範圍為-1.04~1.15V,電流跟隨的線性範圍為-9.02~6.66mA,iX/iZ的-3dB帶寬為1.6GHz。輸齣信號的幅度以20dB/decade的斜率下降,相位在低于3MHz的頻段上保持在90°。
개소료일충기우저압、관대、궤대궤、자편치CMOS제이대전류전수기(CCⅡ)적전류모식적분기전로,능엄범응용우무선통신、사빈등고빈모의전로중。통과채용0.18μm공예삼수,진행Hspice방진,결과표명:전류전수기전압근수적선성범위위-1.04~1.15V,전류근수적선성범위위-9.02~6.66mA,iX/iZ적-3dB대관위1.6GHz。수출신호적폭도이20dB/decade적사솔하강,상위재저우3MHz적빈단상보지재90°。
An integrator based on low-vohage,wideband, rail-to-rail and self-biased CMOS second generation current conveyor (CCⅡ) is proposed,which is widely used in wireless communications, RF and other high-frequency analog circuits. Using 0.18urn CMOS process parameters, the Hspice simulation showed that the following voltage of the current conveyor varies linearly from -1.04V to 1.15V, and the linear range of the following current is -9.02mA-6.66mA. The iX/iZ has -3dB bandwidth of 1.6GHz. The output amplitude decreases on the slope of 20dB/decade, and the phase remains 90 degree when the frequency is below 3 MHz.