CAJ | 학술논문

介绍了利用FPGA实现抗干扰DDS系统的设计，着重阐述了DDS系统在FPGA中的具体设计方案以及相位累加器设计和相位幅度转换电路及控制电路的设计；给出了利用FPGA实现DDS系统的仿真结果以及控制原理图；滤波器模块采用了自适应IIR滤波器，增强了该系统的抗干扰效果。
개소료이용FPGA실현항간우DDS계통적설계，착중천술료DDS계통재FPGA중적구체설계방안이급상위루가기설계화상위폭도전환전로급공제전로적설계；급출료이용FPGA실현DDS계통적방진결과이급공제원리도；려파기모괴채용료자괄응IIR려파기，증강료해계통적항간우효과。
The design of the anti-jamming DDS system realized by using FPGA is introduced. The design scheme of the DDS system,design of phase accumulator,phase amplitude switching circuit and control circuit are elaborated. The simulation result control schematic diagram of the DDS system realized by using FPGA are offered in this paper. The adaptive IIR notch fil-ter is used as filter module to enhance the anti-jamming effect of the system.