陇东学院学报
隴東學院學報
롱동학원학보
JOURNAI OF LONGDONG UNIVERSITY
2012年
5期
3-8
,共6页
Verilog%硬件描述语言%自动售货机
Verilog%硬件描述語言%自動售貨機
Verilog%경건묘술어언%자동수화궤
Verilog%Hardware description language%Vending machine
Verilog硬件描述语言用于从算法级、门级到开关级的多种抽象设计层次的数字系统建模,并通过仿真软件完成硬件电路的调试,使得硬件开发周期和成本降低.介绍了Verilog HDL的特点和应用,并以自动售货机的设计为例,详细地说明了它的设计过程,并给出了代码,通过时序仿真波形证明设计的正确性.
Verilog硬件描述語言用于從算法級、門級到開關級的多種抽象設計層次的數字繫統建模,併通過倣真軟件完成硬件電路的調試,使得硬件開髮週期和成本降低.介紹瞭Verilog HDL的特點和應用,併以自動售貨機的設計為例,詳細地說明瞭它的設計過程,併給齣瞭代碼,通過時序倣真波形證明設計的正確性.
Verilog경건묘술어언용우종산법급、문급도개관급적다충추상설계층차적수자계통건모,병통과방진연건완성경건전로적조시,사득경건개발주기화성본강저.개소료Verilog HDL적특점화응용,병이자동수화궤적설계위례,상세지설명료타적설계과정,병급출료대마,통과시서방진파형증명설계적정학성.
Verilog Hardware description language is used for digital system modeling,including algorithm level and gate level as well as switch level.By debugging the hardware circuit,we can reduce hardware development cycle and cost.The paper introduces the features and application of Verilog HDL,and taking the design of vending machine as an example,illustrates in detail its design process,codes being given.The validity of the design is proved by timing simulation waveform.
