CAJ | 학술논문

采用传统过零鉴相器的数字锁相环（DPLL）实现简单,当同步信号受干扰时会存在多个过零点,将导致鉴相失败。为解决这一问题,提出了多过零鉴相器：可以统计一个周期内的多个捕获周期值,结合同步信号采样,准确定位过零点,进而计算出相位差。随后,介绍了采用模糊PI控制的数字锁相环的软件实现流程。通过实验验证了该方法的可行性。
채용전통과령감상기적수자쇄상배（DPLL）실현간단,당동보신호수간우시회존재다개과영점,장도치감상실패。위해결저일문제,제출료다과령감상기：가이통계일개주기내적다개포획주기치,결합동보신호채양,준학정위과영점,진이계산출상위차。수후,개소료채용모호PI공제적수자쇄상배적연건실현류정。통과실험험증료해방법적가행성。
Although the digital phase-locked loop (DPLL) with traditional zero-crossing phase detector can be implemented conveniently, it becomes inability when the synchronization signal with interference would produce multi-zero-crossing results. To solve the problem, a multi-zero-crossing phase detector was proposed: the phase detector can get all capture values during one cycle and accurately locate the zero-crossing position of current with the sampling values of synchronization signal. Thus the phase error can be calculated. The software implementation of DPLL based on fuzzy PI controlling was proposed then. Finally, the feasibility was validated by experiments.