CAJ | 학술논문

本文研究了SOC高速数字集成电路测试用Loadboard信号完垫l生（SI）的问题0提出了一种基于Hyperlynx软件平台对Loadboard信号完整性进行建模和仿真的方法，研究了元件封装、布线长度、层叠设置、特征阻抗等参数的变化对高频信号产生的影响，从而分析出保证Loadboard电路板SI的设计方法。
본문연구료SOC고속수자집성전로측시용Loadboard신호완점l생（SI）적문제0제출료일충기우Hyperlynx연건평태대Loadboard신호완정성진행건모화방진적방법，연구료원건봉장、포선장도、층첩설치、특정조항등삼수적변화대고빈신호산생적영향，종이분석출보증Loadboard전로판SI적설계방법。
This paper studies the signal integrity （SI） issues in the loadboard which is used for high-speed digital integrated circuit testing. We propose a modeling and simulation method for Loardboard SI in hyperlynx. We also study the im- pacts on high-speed signals when the component package, trace length, stackup settings, characteris- tic impedance and other parameters change, and analyze the methods to ensure the SI of the load- board.