原子核物理评论
原子覈物理評論
원자핵물리평론
Nuclear Physics Review
2014年
3期
374-378
,共5页
张瑞锋%王贤武%许哲%仪孝平
張瑞鋒%王賢武%許哲%儀孝平
장서봉%왕현무%허철%의효평
ADS,Nios II%数字低电平%以太网通讯%总监控
ADS,Nios II%數字低電平%以太網通訊%總鑑控
ADS,Nios II%수자저전평%이태망통신%총감공
ADS%Nios II%digital low level RF control%network communication%monitor
中国科学院近代物理研究所自主研发的ADS 162.5 MHz高频低电平控制采用数字化技术实现,控制环路的参数设置、开闭环操作以及状态监测都通过监控系统实现。该系统基于以太网通讯,采用轻量化客户端-服务器端的工作方式,运行在上位机的客户端程序发送指令数据包,运行在高频数字低电平系统的服务器端响应指令,完成参数监测与控制。系统首先以Atera公司Stratix III系列现场可编程门阵列(FPGA)开发板为基础,构建以Nios II处理器和三速以太网接口为核心的服务器端硬件系统;其次基于Micro C/OS II实时操作系统和轻量级TCP/IP协议栈,设计服务器端软件系统;最后利用MFC设计运行于上位机的客户端界面程序。经过长时间测试运行,该监控系统运行稳定可靠, TCP发送和接收吞吐率达到11.931038 Mbps和8.117624 Mbps。
中國科學院近代物理研究所自主研髮的ADS 162.5 MHz高頻低電平控製採用數字化技術實現,控製環路的參數設置、開閉環操作以及狀態鑑測都通過鑑控繫統實現。該繫統基于以太網通訊,採用輕量化客戶耑-服務器耑的工作方式,運行在上位機的客戶耑程序髮送指令數據包,運行在高頻數字低電平繫統的服務器耑響應指令,完成參數鑑測與控製。繫統首先以Atera公司Stratix III繫列現場可編程門陣列(FPGA)開髮闆為基礎,構建以Nios II處理器和三速以太網接口為覈心的服務器耑硬件繫統;其次基于Micro C/OS II實時操作繫統和輕量級TCP/IP協議棧,設計服務器耑軟件繫統;最後利用MFC設計運行于上位機的客戶耑界麵程序。經過長時間測試運行,該鑑控繫統運行穩定可靠, TCP髮送和接收吞吐率達到11.931038 Mbps和8.117624 Mbps。
중국과학원근대물리연구소자주연발적ADS 162.5 MHz고빈저전평공제채용수자화기술실현,공제배로적삼수설치、개폐배조작이급상태감측도통과감공계통실현。해계통기우이태망통신,채용경양화객호단-복무기단적공작방식,운행재상위궤적객호단정서발송지령수거포,운행재고빈수자저전평계통적복무기단향응지령,완성삼수감측여공제。계통수선이Atera공사Stratix III계렬현장가편정문진렬(FPGA)개발판위기출,구건이Nios II처리기화삼속이태망접구위핵심적복무기단경건계통;기차기우Micro C/OS II실시조작계통화경량급TCP/IP협의잔,설계복무기단연건계통;최후이용MFC설계운행우상위궤적객호단계면정서。경과장시간측시운행,해감공계통운행은정가고, TCP발송화접수탄토솔체도11.931038 Mbps화8.117624 Mbps。
162.5 MHz high-frequency low-level control system self-developed by Institute of Modern Physics for ADS project took digital technology. All parameters’ reading&writing,including loop parameter setting, open& close-loop operation, and condition monitoring, were achieved through the monitoring system. The system used lightweight client-server working mode that client running in the PC sent command data, server running on high-frequency digital low level system responded instructions to complete parameter monitoring and control. The system consisted of three parts. Firstly, server hardware system was constructed based on Atera Stratix III family of field-programmable gate array (FPGA) development board. Secondly,the server software system was designed based on Micro C/OS II real-time operating systems and lightweight TCP / IP protocol stack, and finally a client PC program was designed based on MFC. After a long test, it was indicated that the monitoring system works properly and stably. TCP sends and receives throughput reached 11.931 038 Mbps and 8.117 624 Mbps.