CAJ | 학술논문

网络数据量的急剧增加，带来了带宽的急剧消耗和网络拥挤问题，这些问题对分组传输网络芯片的转发容量、速率、拥塞避免和流量管理等方面提出了更高的要求。为了提高分组传输网络芯片中 IP组播查找电路的工作速率和降低电路设计复杂度，采用流水线结构，并利用 RAM(随机访问存储器)记录查找中间状态信息等技术完成了对 IP 组播查找电路的设计。在Altera系列FPGA(现场可编程门阵列)开发板EP4SGX230KF40C2ES上进行了硬件验证，结果表明，该电路能够完成IP组播查找功能，并稳定工作在200 MHz频率下。
망락수거량적급극증가，대래료대관적급극소모화망락옹제문제，저사문제대분조전수망락심편적전발용량、속솔、옹새피면화류량관리등방면제출료경고적요구。위료제고분조전수망락심편중 IP조파사조전로적공작속솔화강저전로설계복잡도，채용류수선결구，병이용 RAM(수궤방문존저기)기록사조중간상태신식등기술완성료대 IP 조파사조전로적설계。재Altera계렬FPGA(현장가편정문진렬)개발판EP4SGX230KF40C2ES상진행료경건험증，결과표명，해전로능구완성IP조파사조공능，병은정공작재200 MHz빈솔하。
Sharp increase of network data amount causes rapid bandwidth consumption and network congestion,which places still higher requirements on Packet Transport Network(PTN)chips in terms of forwarding capacity,clock rate,congestion a-voidance and flow management.In order to improve the clock rate and reduce the circuit design complexity of the IP multicast lookup circuits in these network chips,this paper completes this circuit design by adopting pipeline architecture and looking up the intermediate state information using the RAM record.It conducts hardware verification on Altera series FPGA development board EP4SGX230KF40C2ES and the results show that this circuit can complete the IP multicast lookup function and works steadily at 200 MHz.