传感技术学报
傳感技術學報
전감기술학보
Journal of Transduction Technology
2013年
11期
1525-1531
,共7页
张冬苓%姚素英%徐江涛%徐超%高志远%韩立镪
張鼕苓%姚素英%徐江濤%徐超%高誌遠%韓立鏹
장동령%요소영%서강도%서초%고지원%한립강
CMOS图像传感器%大尺寸像素%电势梯度%电荷转移效率
CMOS圖像傳感器%大呎吋像素%電勢梯度%電荷轉移效率
CMOS도상전감기%대척촌상소%전세제도%전하전이효솔
CMOS image sensor%large size pixel%electric potential gradient%charge transfer efficiency
为了提高CMOS图像传感器大尺寸像素的电荷转移效率,消除图像拖尾,通过对像素内电荷转移的RC模型分析,提出一种优化电荷转移的方法。从工艺和版图两方面进行优化,工艺方面是在N埋层的形成步骤中增加一步P型杂质注入,使光电二极管内存在电场,增强电荷转移;版图方面是优化光电二极管的版图为U型,使传输栅伸进光电二极管内尽量长,减少RC模型的传输级数,提高电荷转移效率。与传统像素相比,工艺和版图的优化使电荷转移效率分别提高了2倍和3.3倍,转移时间也分别缩短到传统像素结构的26%和30%左右。对传统像素结构进行工艺和版图同时优化则使电荷转移效率提高了9.5倍。
為瞭提高CMOS圖像傳感器大呎吋像素的電荷轉移效率,消除圖像拖尾,通過對像素內電荷轉移的RC模型分析,提齣一種優化電荷轉移的方法。從工藝和版圖兩方麵進行優化,工藝方麵是在N埋層的形成步驟中增加一步P型雜質註入,使光電二極管內存在電場,增彊電荷轉移;版圖方麵是優化光電二極管的版圖為U型,使傳輸柵伸進光電二極管內儘量長,減少RC模型的傳輸級數,提高電荷轉移效率。與傳統像素相比,工藝和版圖的優化使電荷轉移效率分彆提高瞭2倍和3.3倍,轉移時間也分彆縮短到傳統像素結構的26%和30%左右。對傳統像素結構進行工藝和版圖同時優化則使電荷轉移效率提高瞭9.5倍。
위료제고CMOS도상전감기대척촌상소적전하전이효솔,소제도상타미,통과대상소내전하전이적RC모형분석,제출일충우화전하전이적방법。종공예화판도량방면진행우화,공예방면시재N매층적형성보취중증가일보P형잡질주입,사광전이겁관내존재전장,증강전하전이;판도방면시우화광전이겁관적판도위U형,사전수책신진광전이겁관내진량장,감소RC모형적전수급수,제고전하전이효솔。여전통상소상비,공예화판도적우화사전하전이효솔분별제고료2배화3.3배,전이시간야분별축단도전통상소결구적26%화30%좌우。대전통상소결구진행공예화판도동시우화칙사전하전이효솔제고료9.5배。
In order to improve the charge transfer efficiency of the large size pixel in CMOS image sensor and eliminate the image lag,an optimized method of charge transfer was proposed by analyzing the RC model of the charge transfer in pixel, optimizing the pixel in both the process and layout. One is adding a P-type implant during the process of forming the N buried layer,which leads to an electric field within the photodiode,thus the charge transfer is enhanced. The other is to optimize the photodiode layout as U-shaped to improve the charge transfer efficiency of pixel,which makes the transfer gate extend into the photodiode as deep as possible and reduce the transmission series of RC model. Compared with the traditional pixel,the charge transfer efficiency of the above two optimized methods were increased by 2 times and 3. 3 times respectively. And the transfer time is also shortened by 26% and 30% re-spectively. The charge transfer efficiency was increased by 9. 5 times both in the process and layout optimization.