现代电子技术
現代電子技術
현대전자기술
MODERN ELECTRONICS TECHNIQUE
2014年
3期
137-140
,共4页
数字日历%VHDL%FPGA%Quartus Ⅱ
數字日歷%VHDL%FPGA%Quartus Ⅱ
수자일력%VHDL%FPGA%Quartus Ⅱ
digital calendar%VHDL%FPGA%Quartus Ⅱ
介绍了一种基于FPGA的数字日历设计方案，采用VHDL语言编程设计了一个具有年、月、日、星期、时、分、秒计时显示功能，时间调整功能和整点报时功能的数字日历。采用VHDL和原理图相结合的设计输入方式，在Quartus Ⅱ开发环境下完成设计、编译和仿真，并下载到FPGA芯片EP1C3T144-3上进行结果验证。结果表明：该设计方案切实可行，对FPGA的应用和数字日历的设计具有一定参考价值。
介紹瞭一種基于FPGA的數字日歷設計方案，採用VHDL語言編程設計瞭一箇具有年、月、日、星期、時、分、秒計時顯示功能，時間調整功能和整點報時功能的數字日歷。採用VHDL和原理圖相結閤的設計輸入方式，在Quartus Ⅱ開髮環境下完成設計、編譯和倣真，併下載到FPGA芯片EP1C3T144-3上進行結果驗證。結果錶明：該設計方案切實可行，對FPGA的應用和數字日歷的設計具有一定參攷價值。
개소료일충기우FPGA적수자일력설계방안，채용VHDL어언편정설계료일개구유년、월、일、성기、시、분、초계시현시공능，시간조정공능화정점보시공능적수자일력。채용VHDL화원리도상결합적설계수입방식，재Quartus Ⅱ개발배경하완성설계、편역화방진，병하재도FPGA심편EP1C3T144-3상진행결과험증。결과표명：해설계방안절실가행，대FPGA적응용화수자일력적설계구유일정삼고개치。
A design scheme of digital calendar based on FPGA is introduced. VHDL programming language is used to de-sign the digital calendar,which has functions of displaying the year,month,day,week,hour,minute,second,time adjust-ment and the Hourly chime. The input method of the scheme is in combination VHDL and block diagram. The design,compiling and simulation are completed under Quartus Ⅱ development environment. The designed file is accomplished and downloaded into FPGA chip EP1C3T144-3 to verify the results. The experiment results verify that the design scheme is workable,and can pro-vide references for the application of FPGA and the design of digital calendar.
