CAJ | 학술논문

鉴于高速数据采集系统对实时数据存储带宽和容量的要求，提出一种基于现场可编程门阵列(FPGA)的高速多通道并行固态存储系统。该系统以现场可编程门阵列器件XCV5LX110T为核心，选用大容量高速闪存芯片作为存储介质，通过采用并行总线拓宽技术和流水线缓冲技术，在 FPGA 片内搭建高速多通道并行存储硬件架构，从硬件角度提高系统的数据吞吐带宽。设计一种基于超级页的地址映射策略，并使用该策略对闪存转换层算法的请求处理机制进行并行加速优化，从软件角度提高系统的存储并行性。测试结果表明，该系统的最大存储速度达到73 MB/s，其性能指标能满足高速实时数据存储的需求，证明多通道存储架构和FTL算法具有良好的并行性和可扩展性。
감우고속수거채집계통대실시수거존저대관화용량적요구，제출일충기우현장가편정문진렬(FPGA)적고속다통도병행고태존저계통。해계통이현장가편정문진렬기건XCV5LX110T위핵심，선용대용량고속섬존심편작위존저개질，통과채용병행총선탁관기술화류수선완충기술，재 FPGA 편내탑건고속다통도병행존저경건가구，종경건각도제고계통적수거탄토대관。설계일충기우초급혈적지지영사책략，병사용해책략대섬존전환층산법적청구처리궤제진행병행가속우화，종연건각도제고계통적존저병행성。측시결과표명，해계통적최대존저속도체도73 MB/s，기성능지표능만족고속실시수거존저적수구，증명다통도존저가구화FTL산법구유량호적병행성화가확전성。
Aiming at the high requirement for storage bandwidth and capacity in the high speed data acquisition system, a design of high-speed multi-channel solid state storage system based on Field Programming Gate Array(FPGA) is proposed. With the FPGA device XCV5LX110T as the core and large-capacity high-speed NAND Flash memory as the storage medium, it improves the data throughout bandwidth from the hardware perspective through constructing a high speed multi-channel storage architecture in FPGA by using parallel bus expansion and pipeline buffering technology. In order to improve the storage parallelism from the software perspective, an address mapping scheme which is based on super page is used to optimize the parallelism of the request process mechanism in the Flash Translation Layer(FTL) algorithm. Test result shows that the maxim storage speed of this system can be 73 MB/s which can meet the desire of the high speed data acquisition system and proves that this multi-channel storage architecture and the FTL algorithm have excellent parallelism and scalability.