电子信息对抗技术
電子信息對抗技術
전자신식대항기술
ELECTRONIC INFORMATION WARFARE TECHNOLOGY
2014年
5期
74-77
,共4页
何仁伦%李旭鹏%熊金旺%赵妍
何仁倫%李旭鵬%熊金旺%趙妍
하인륜%리욱붕%웅금왕%조연
正交调制%FPGA%DAC%数字预失真%QPSK
正交調製%FPGA%DAC%數字預失真%QPSK
정교조제%FPGA%DAC%수자예실진%QPSK
quadrature modulation%FPGA%DAC%digital predistortion%QPSK
模拟正交调制可有效降低对FPGA等数字器件的工作频率要求，特别适合于高等级大规模高速FPGA器件受到限制的星载设备及军用设备研制场合。但由于器件指标限制及电路的不一致性，模拟正交调制存在较大的电路误差，而通过电路设计和调试将误差减小的工程实现难度较大。提出一种数字校正方法，通过在基带信号引入2个校正因子，可有效校正模拟正交调制的电路误差，完全满足正交不平衡度小于1毅、幅度不平衡度小于0.2dB的指标需求。
模擬正交調製可有效降低對FPGA等數字器件的工作頻率要求，特彆適閤于高等級大規模高速FPGA器件受到限製的星載設備及軍用設備研製場閤。但由于器件指標限製及電路的不一緻性，模擬正交調製存在較大的電路誤差，而通過電路設計和調試將誤差減小的工程實現難度較大。提齣一種數字校正方法，通過在基帶信號引入2箇校正因子，可有效校正模擬正交調製的電路誤差，完全滿足正交不平衡度小于1毅、幅度不平衡度小于0.2dB的指標需求。
모의정교조제가유효강저대FPGA등수자기건적공작빈솔요구，특별괄합우고등급대규모고속FPGA기건수도한제적성재설비급군용설비연제장합。단유우기건지표한제급전로적불일치성，모의정교조제존재교대적전로오차，이통과전로설계화조시장오차감소적공정실현난도교대。제출일충수자교정방법，통과재기대신호인입2개교정인자，가유효교정모의정교조제적전로오차，완전만족정교불평형도소우1의、폭도불평형도소우0.2dB적지표수구。
Analog quadrature modulation can effectively reduce the demand of work speed of dig-ital devices, so it is especially suitable for satellite equipment and military equipment develop-ment while high grade, large-scale, high speed logic devices is embargoed. However, because of the defects of components and circuits, analog quadrature modulation may bring on serious signal distortion, and it is usually very difficult to deal with this problem by designing and de-bugging. A new method is presented, by introducing two correction factors into the baseband signal, which can effectively revise the error of analog quadrature modulation, fully meet the de-mands of quadrature unbalanced less than 1 degree, and amplitude imbalance less than 0. 2dB.
