现代电子技术
現代電子技術
현대전자기술
MODERN ELECTRONICS TECHNIQUE
2014年
19期
52-56
,共5页
FPGA%软件无线电%数字中频接收%宽频谱信号
FPGA%軟件無線電%數字中頻接收%寬頻譜信號
FPGA%연건무선전%수자중빈접수%관빈보신호
FPGA%software radio%digital intermediate frequency reception%wide-spectrum signal
以软件无线电数字中频接收理论为依据,利用FPGA实现了宽频域无线信号监测的系统设计。本课题主要完成数字中频接收,并将处理后的频谱、信号及监测信息上传至DSP进行解调,利用Simulink实现系统建模仿真;利用Verilog HDL实现各个数据通路模块,包括NCO模块、FIR滤波器模块和FFT模块等;搭建硬件平台,通过FPGA进行系统设计实现。整个系统监测频率范围从500 kHz~6 GHz,输出信号的信噪比达到50 dB以上,实现了对无线宽频谱信号的监测,达到了设计要求。
以軟件無線電數字中頻接收理論為依據,利用FPGA實現瞭寬頻域無線信號鑑測的繫統設計。本課題主要完成數字中頻接收,併將處理後的頻譜、信號及鑑測信息上傳至DSP進行解調,利用Simulink實現繫統建模倣真;利用Verilog HDL實現各箇數據通路模塊,包括NCO模塊、FIR濾波器模塊和FFT模塊等;搭建硬件平檯,通過FPGA進行繫統設計實現。整箇繫統鑑測頻率範圍從500 kHz~6 GHz,輸齣信號的信譟比達到50 dB以上,實現瞭對無線寬頻譜信號的鑑測,達到瞭設計要求。
이연건무선전수자중빈접수이론위의거,이용FPGA실현료관빈역무선신호감측적계통설계。본과제주요완성수자중빈접수,병장처리후적빈보、신호급감측신식상전지DSP진행해조,이용Simulink실현계통건모방진;이용Verilog HDL실현각개수거통로모괴,포괄NCO모괴、FIR려파기모괴화FFT모괴등;탑건경건평태,통과FPGA진행계통설계실현。정개계통감측빈솔범위종500 kHz~6 GHz,수출신호적신조비체도50 dB이상,실현료대무선관빈보신호적감측,체도료설계요구。
The system design for wireless signal monitoring in wide frequency range is realized in this paper based on the SR digital intermediate frequency reception theory. In this subject,the digital intermediate frequency receiver was achieved. The processed spectrum,signal and monitoring information is uploaded to DSP for demodulation. The modeling simulation in system level was realized by means of Simulink. All the data path modules,including NCO module,FIR filter module and FFT module were realized by the aid of Verilog HDL. The hardware platform was created and the prototype verification was performed through FPGA. The system′s monitoring range of frequency is 500 KHz~6GHz and SNR of output signal is more than 50dB. The system realized the monitoring function of wireless spectrum signal and met the design requirements.