现代电子技术
現代電子技術
현대전자기술
MODERN ELECTRONICS TECHNIQUE
2013年
18期
144-147
,共4页
VHDL%频率测量%量化误差%EP2C20F484C7
VHDL%頻率測量%量化誤差%EP2C20F484C7
VHDL%빈솔측량%양화오차%EP2C20F484C7
VHDL%frequency measurement%quantization error%EP2C20F484C7
FPGA/CPLD在数字系统开发的应用日益广泛，影响到生产生活的方方面面。电子计数式频率计在各种电子测量领域应用广泛。为了降低频率计的量化误差，提高频率测量精度，在Quartus Ⅱ9.0开发环境下，用VHDL语言设计了一种能在1 Hz~100 MHz频率范围内使频率测量相对量化误差小于10-5的高精度数字频率计，仿真结果表明，所设计的数字频率计达到了设计精度要求，并能准确显示测量数值。最后，以Cyclone Ⅱ系列EP2C20F484C7芯片为硬件环境，验证了各项设计功能的正确性。
FPGA/CPLD在數字繫統開髮的應用日益廣汎，影響到生產生活的方方麵麵。電子計數式頻率計在各種電子測量領域應用廣汎。為瞭降低頻率計的量化誤差，提高頻率測量精度，在Quartus Ⅱ9.0開髮環境下，用VHDL語言設計瞭一種能在1 Hz~100 MHz頻率範圍內使頻率測量相對量化誤差小于10-5的高精度數字頻率計，倣真結果錶明，所設計的數字頻率計達到瞭設計精度要求，併能準確顯示測量數值。最後，以Cyclone Ⅱ繫列EP2C20F484C7芯片為硬件環境，驗證瞭各項設計功能的正確性。
FPGA/CPLD재수자계통개발적응용일익엄범，영향도생산생활적방방면면。전자계수식빈솔계재각충전자측량영역응용엄범。위료강저빈솔계적양화오차，제고빈솔측량정도，재Quartus Ⅱ9.0개발배경하，용VHDL어언설계료일충능재1 Hz~100 MHz빈솔범위내사빈솔측량상대양화오차소우10-5적고정도수자빈솔계，방진결과표명，소설계적수자빈솔계체도료설계정도요구，병능준학현시측량수치。최후，이Cyclone Ⅱ계렬EP2C20F484C7심편위경건배경，험증료각항설계공능적정학성。
The application of the FPGA/CPLD becomes more and more extensive in the design of digital systems and it has affected people’s life deeply,so the electronic counter type frequency meter is widely used in various electronic measurement fields. In order to reduce quantization error of the frequency meter and improve the accuracy of frequency measurement,a high-precision digital frequency meter whose relative quantization error is less than 10-5 was designed with VHDL language under the development environment of Quartus Ⅱ9.0. Its frequency measurement range is 1 Hz~100 MHz. The simulation results indicate that the digital frequency meter can meet accuracy requirements,and can accurately display measured value. The correctness of all the designed functions was validated with the EP2C20F484C7 chip of Cyclone Ⅱ series.
