现代电子技术
現代電子技術
현대전자기술
MODERN ELECTRONICS TECHNIQUE
2014年
8期
72-74
,共3页
陈定平%张忠华%李理%赵圣哲
陳定平%張忠華%李理%趙聖哲
진정평%장충화%리리%조골철
DMOS Vfsd超上限%背面减薄%背面硅腐蚀%表面活性剂%背面注入
DMOS Vfsd超上限%揹麵減薄%揹麵硅腐蝕%錶麵活性劑%揹麵註入
DMOS Vfsd초상한%배면감박%배면규부식%표면활성제%배면주입
DMOS Vfsd%Ultra limit%backside grinding%backside Si wet etch%surfactant%backside implantation
一些DMOS产品的Vfsd上限要求做得很低,这样背金工艺的窗口就非常窄、经常发生Vfsd超上限的事件。如何拓宽背金工艺窗口、满足特殊DMOS产品对Vfsd的苛刻要求,在此研究了背面减薄、背面硅腐蚀和背面注入的主要工艺关键参数对Vfsd的影响。比较减薄机研磨轮目数后发现,研磨轮目数决定背面粗糙度,进而影响背面SI与背面金属的接触电阻和Vfsd;比较硅腐蚀有、无活性剂后发现,加了活性剂的背面硅腐蚀速率温和、均匀性好,可减缓切入式减薄机的Vfsd扇形分布、Vfsd均匀性明显改善。背注能量拉偏后发现,降低背注能量可降低Vfsd的Mean值。综合以上机理分析和实验结果,找到了背面最佳工艺条件,大大拓宽了背金工艺窗口。在最佳背面工艺条件下,这些特殊的DMOS产品Vfsd超上限几率从1.5%下降到0.1%以下、良率平均上升4%,此背金最佳工艺可以成为DMOS生产的标准工艺。
一些DMOS產品的Vfsd上限要求做得很低,這樣揹金工藝的窗口就非常窄、經常髮生Vfsd超上限的事件。如何拓寬揹金工藝窗口、滿足特殊DMOS產品對Vfsd的苛刻要求,在此研究瞭揹麵減薄、揹麵硅腐蝕和揹麵註入的主要工藝關鍵參數對Vfsd的影響。比較減薄機研磨輪目數後髮現,研磨輪目數決定揹麵粗糙度,進而影響揹麵SI與揹麵金屬的接觸電阻和Vfsd;比較硅腐蝕有、無活性劑後髮現,加瞭活性劑的揹麵硅腐蝕速率溫和、均勻性好,可減緩切入式減薄機的Vfsd扇形分佈、Vfsd均勻性明顯改善。揹註能量拉偏後髮現,降低揹註能量可降低Vfsd的Mean值。綜閤以上機理分析和實驗結果,找到瞭揹麵最佳工藝條件,大大拓寬瞭揹金工藝窗口。在最佳揹麵工藝條件下,這些特殊的DMOS產品Vfsd超上限幾率從1.5%下降到0.1%以下、良率平均上升4%,此揹金最佳工藝可以成為DMOS生產的標準工藝。
일사DMOS산품적Vfsd상한요구주득흔저,저양배금공예적창구취비상착、경상발생Vfsd초상한적사건。여하탁관배금공예창구、만족특수DMOS산품대Vfsd적가각요구,재차연구료배면감박、배면규부식화배면주입적주요공예관건삼수대Vfsd적영향。비교감박궤연마륜목수후발현,연마륜목수결정배면조조도,진이영향배면SI여배면금속적접촉전조화Vfsd;비교규부식유、무활성제후발현,가료활성제적배면규부식속솔온화、균균성호,가감완절입식감박궤적Vfsd선형분포、Vfsd균균성명현개선。배주능량랍편후발현,강저배주능량가강저Vfsd적Mean치。종합이상궤리분석화실험결과,조도료배면최가공예조건,대대탁관료배금공예창구。재최가배면공예조건하,저사특수적DMOS산품Vfsd초상한궤솔종1.5%하강도0.1%이하、량솔평균상승4%,차배금최가공예가이성위DMOS생산적표준공예。
Since some special DMOS products require very low Vfsd′s upper limit,the window of backside process be-comes very narrow and the phenomenon of Vfsd upper limit happens quite often. To widen the window of backside process and satisfy the Vfsd requirement of special DMOS products,the influence of key parameters of main processes of backside grinding, backside Si wet etching and backside injection on Vfsd value is studied. According to the comparison result of backside grinding wheels with different mesh numbers,it is found that the mesh number of grinding wheel affects the roughness on the backside greatly,as well as the contact resistance between backside Si and backside metal. After comparing Si wet etching with and without active agent,it is found that surfactants’injection can slow down Vfsd’s sector distribution and improve Vfsd uniformity obviously. To lowing down the backside injection energy can reduce Vfsd’s Mean value. BKM conditions of backside process were found out from the mechanism analysis and experiments results. Under BKM condition,special DMOS products’s Vfsd ul-tralimit rate reduced from 1.5% to current 0.1% and CP yield increased 4%. This BKM process can be applied as standard pro-cess of DMOS production.