CAJ | 학술논문

指令Cache作为高性能计算机系统中指令代码的高速缓冲，在整个系统中占有重要地位，其正确性验证工作很有必要。针对对称多处理机结构的一级和二级指令Cache验证提出多种验证策略，对各种验证策略造成指令Cache的颠簸效果进行实验和分析，并且试图将各种验证策略综合成一个完备的验证系统，从而保证指令Cache设计的正确性。
지령Cache작위고성능계산궤계통중지령대마적고속완충，재정개계통중점유중요지위，기정학성험증공작흔유필요。침대대칭다처리궤결구적일급화이급지령Cache험증제출다충험증책략，대각충험증책략조성지령Cache적전파효과진행실험화분석，병차시도장각충험증책략종합성일개완비적험증계통，종이보증지령Cache설계적정학성。
The verification work for the correctness of the instruction Cache is necessary , for as the cache of instruction code in whole high performance computer system , it plays an important role in the system .In this paper we propose a series of verification strategies aiming at verifying the L1 and L2 instruction Cache in SMP (symmetrical multi-processing), and carry out the experiment and analysis on jolt effects of instruction Cache caused by various verification strategies , and try to integrate diverse verification strategies to a complete verification system , so as to guarantee the correctness of instruction Cache design .