CAJ | 학술논문

　　基于计算全息术的三维动态实时显示受到越来越多的关注，而制约其发展的一大难题是其运算速度。针对这一问题，本文提出基于SOPC(System On Programmable Chips)技术的计算全息硬件加速系统，使多片FPGA硬件进行分块并行运算。为了实现这一目标，每片FPGA运算单元必须独立具备数据传输与计算全息算法加速两种功能。在已有计算全息算法加速模块的基础上，搭载NIOS II软核并移植uC/OS II操作系统及LWIP以太网协议栈。 NIOS II软核作为FPGA的主控，控制计算全息算法加速模块及以太网口的数据传输，实验结果证明该方法为实现计算全息三维动态实时显示提供了一种新的思路。
　　기우계산전식술적삼유동태실시현시수도월래월다적관주，이제약기발전적일대난제시기운산속도。침대저일문제，본문제출기우SOPC(System On Programmable Chips)기술적계산전식경건가속계통，사다편FPGA경건진행분괴병행운산。위료실현저일목표，매편FPGA운산단원필수독립구비수거전수여계산전식산법가속량충공능。재이유계산전식산법가속모괴적기출상，탑재NIOS II연핵병이식uC/OS II조작계통급LWIP이태망협의잔。 NIOS II연핵작위FPGA적주공，공제계산전식산법가속모괴급이태망구적수거전수，실험결과증명해방법위실현계산전식삼유동태실시현시제공료일충신적사로。
More and more people pay attention to real-time three-dimensional dynamic display technology based on computer generated hologram. The major problem to restrict its development is computing speed. To solve the problem, we build PC-FPGA distributed computing holographic hardware acceleration system that multi-chip FPGA hardware block computing paralleled. Each chip FPGA unit must have the functions both of holographic algorithms computing and the data transmission to achieve this goal. Therefore, NIOS II soft core transplant uC/OS II operating system and LWIP Ethernet protocol stack based on already CGH algorithm acceleration module, NIOS II as the MCU to control CGH algorithm acceleration module and Ethernet data transmission. The article will introduce the NIOS II soft-core, uC/OS II and LWIP achieve to Ethernet data transmission process. To provide a new method to the realization of three-dimensional dynamic real-time display based on CGH.