自动化与仪器仪表
自動化與儀器儀錶
자동화여의기의표
AUTOMATION & INSTRUMENTATION
2014年
6期
47-51
,共5页
合并单元%FPGA%9-2%以太网
閤併單元%FPGA%9-2%以太網
합병단원%FPGA%9-2%이태망
Merging unit%FPGA%9-2%Ethernet
介绍了一种智能变电站合并单元的设计方案，采用现场可编程逻辑阵列（FPGA）作为硬件框架，充分利用FPGA的模块化编程和多任务处理的特点，通过在FPGA芯片上配置NiosII软核处理器和相关接口，完成合并单元采样脉冲同步、数据采集及处理，将数据按照IEC61850-9-2标准组帧通过以太网与过程层设备通信发送至过程层设备。运用MMS Ethereal软件对本合并单元输出的电压、电流信号进行测试，结果表明该合并单元所送数据与接收数据一致，符合9-2标准。本装置可以实现了合并单元多任务、大信息量及实时高通速信的要求，具有较强的实用价值。
介紹瞭一種智能變電站閤併單元的設計方案，採用現場可編程邏輯陣列（FPGA）作為硬件框架，充分利用FPGA的模塊化編程和多任務處理的特點，通過在FPGA芯片上配置NiosII軟覈處理器和相關接口，完成閤併單元採樣脈遲同步、數據採集及處理，將數據按照IEC61850-9-2標準組幀通過以太網與過程層設備通信髮送至過程層設備。運用MMS Ethereal軟件對本閤併單元輸齣的電壓、電流信號進行測試，結果錶明該閤併單元所送數據與接收數據一緻，符閤9-2標準。本裝置可以實現瞭閤併單元多任務、大信息量及實時高通速信的要求，具有較彊的實用價值。
개소료일충지능변전참합병단원적설계방안，채용현장가편정라집진렬（FPGA）작위경건광가，충분이용FPGA적모괴화편정화다임무처리적특점，통과재FPGA심편상배치NiosII연핵처리기화상관접구，완성합병단원채양맥충동보、수거채집급처리，장수거안조IEC61850-9-2표준조정통과이태망여과정층설비통신발송지과정층설비。운용MMS Ethereal연건대본합병단원수출적전압、전류신호진행측시，결과표명해합병단원소송수거여접수수거일치，부합9-2표준。본장치가이실현료합병단원다임무、대신식량급실시고통속신적요구，구유교강적실용개치。
For the more effective application of modular programming and multi-tasking of FPGA, the de-sign of an intelligent substation merged cells is proposed using field programmable logic array (FPGA) as a hardware framework. By configuring Nios II soft-core processor and associated interface on the FPGA chip, the merger unit completes sampling pulse synchronization, data acquisition and processing, and the data is sent to the process layer device via Ethernet equipment and process layer in accordance with IEC61850-9-2 stan-dard framing. Using MMS Ethereal software to test voltage and current signals of output from the merging unit, the results show that the combination unit to send data and receive data consistency meeting the standard 9-2. This device can achieve the demand of merge cells of multi-tasking, a large amount of information and re-al-time high-speed communication, and have a strong practical value.
