电子与封装
電子與封裝
전자여봉장
EIECTRONICS AND PACKAGING
2014年
6期
23-27,31
,共6页
QDR SRAM%存储%状态机%SOC
QDR SRAM%存儲%狀態機%SOC
QDR SRAM%존저%상태궤%SOC
QDR SRAM%memory%state machine%SOC
针对高速网络的需求,介绍了一种高速静态存储器QDRⅡ SRAM,设计了一种基于AMBA总线的高性能QDRⅡSRAM控制器IP,具有良好的接口兼容性和可移植性。使用了深度为8×72位的写出FIFO与8×72位读入缓冲,增加了系统存取的效率,设计通过仿真及实际验证,能够良好应用于系统时钟为800 MHz的SOC环境中,满足功能和时序要求。
針對高速網絡的需求,介紹瞭一種高速靜態存儲器QDRⅡ SRAM,設計瞭一種基于AMBA總線的高性能QDRⅡSRAM控製器IP,具有良好的接口兼容性和可移植性。使用瞭深度為8×72位的寫齣FIFO與8×72位讀入緩遲,增加瞭繫統存取的效率,設計通過倣真及實際驗證,能夠良好應用于繫統時鐘為800 MHz的SOC環境中,滿足功能和時序要求。
침대고속망락적수구,개소료일충고속정태존저기QDRⅡ SRAM,설계료일충기우AMBA총선적고성능QDRⅡSRAM공제기IP,구유량호적접구겸용성화가이식성。사용료심도위8×72위적사출FIFO여8×72위독입완충,증가료계통존취적효솔,설계통과방진급실제험증,능구량호응용우계통시종위800 MHz적SOC배경중,만족공능화시서요구。
In the paper, QDRⅡSRAM as a kind of high speed static radom access memory is introduced for the request of high speed internet, the paper designs a high performance IP of QDRⅡSRAM controller based on AMBA bus which has good performance on interface compatibility and transplanting. Using 8× 72 bit write out FIFO and 8×72 bit read in buffer to increase the access efficiency of system. It has been verified successfully in the simulation and fact, using in the SOC system of 800 MHz system clock well, meeting the requirements of function and timing.