CAJ | 학술논문

本文将 EDA 技术引入“数字信号处理”课程实验教学，采用 FPGA 实现了一款基于分布式算法的4阶 FIR 滤波器；利用 FPGA 的 ROM 宏模块构建查找表，实现了分布式算法；利用 QUARTUSⅡ软件完成分布式滤波器电路设计以及波形仿真。与传统的调用 QUARTUS II 软件中的参数化 FIR 宏模块实现方式相比，采用分布式算法实现 FIR 滤波器，不仅能大大节省 FPGA 资源开销，提高运算速度，而且有利于提升学生应用 FPGA 进行硬件设计与开发的能力。
본문장 EDA 기술인입“수자신호처리”과정실험교학，채용 FPGA 실현료일관기우분포식산법적4계 FIR 려파기；이용 FPGA 적 ROM 굉모괴구건사조표，실현료분포식산법；이용 QUARTUSⅡ연건완성분포식려파기전로설계이급파형방진。여전통적조용 QUARTUS II 연건중적삼수화 FIR 굉모괴실현방식상비，채용분포식산법실현 FIR 려파기，불부능대대절성 FPGA 자원개소，제고운산속도，이차유리우제승학생응용 FPGA 진행경건설계여개발적능력。
By introducing EDA technology to the experiment teaching of the Digital Signal Processing course,a 4 order filter based on distributed algorithm is implemented in FPGA. the lookup table(LUT)is built to realize the distributed algorithm by using ROM macro-module of FPGA. The logic design and waveform simulation of the filter is finished on QUARTUSⅡ software. Compared to the style of calling the multiplexing multiplier macro module, the hardware expenses of the DA structure circuit can be cut down greatly and the operation speed can be increased too. Further more,this experiment teaching mode is benefit for improving the student′s ability of hardware design and development.