电脑知识与技术
電腦知識與技術
전뇌지식여기술
COMPUTER KNOWLEDGE AND TECHNOLOGY
2014年
19期
4450-4453
,共4页
呼明亮%车炯晖%赵君%任晓琨
呼明亮%車炯暉%趙君%任曉琨
호명량%차형휘%조군%임효곤
数据采集%IEEE-1394%静态局部重构%模式配置
數據採集%IEEE-1394%靜態跼部重構%模式配置
수거채집%IEEE-1394%정태국부중구%모식배치
date collection%IEEE-1394%dynamic partial reconfiguration%configuration
为了实现数据采集系统实时性、通用化、小型化设计，该文提出了一种基于IEEE-1394总线的高速数据采集系统设计和实现方案。硬件架构上，系统采用IEEE-1394总线专用芯片，实现了数据高速率、高可靠性传输；采用FPGA+DSP的数据处理架构，将数据采集与算法处理分开独立运行；采用FPGA静态局部重构技术，实现了不同子系统的功能配置；采用开关动态切换技术，实现了信号采集的灵活配置和小型化设计。软件架构上，系统采用模块化设计思路，实现了不同工作模式之间的切换。实验表明该系统具备很强的数据采集与解算能力。
為瞭實現數據採集繫統實時性、通用化、小型化設計，該文提齣瞭一種基于IEEE-1394總線的高速數據採集繫統設計和實現方案。硬件架構上，繫統採用IEEE-1394總線專用芯片，實現瞭數據高速率、高可靠性傳輸；採用FPGA+DSP的數據處理架構，將數據採集與算法處理分開獨立運行；採用FPGA靜態跼部重構技術，實現瞭不同子繫統的功能配置；採用開關動態切換技術，實現瞭信號採集的靈活配置和小型化設計。軟件架構上，繫統採用模塊化設計思路，實現瞭不同工作模式之間的切換。實驗錶明該繫統具備很彊的數據採集與解算能力。
위료실현수거채집계통실시성、통용화、소형화설계，해문제출료일충기우IEEE-1394총선적고속수거채집계통설계화실현방안。경건가구상，계통채용IEEE-1394총선전용심편，실현료수거고속솔、고가고성전수；채용FPGA+DSP적수거처리가구，장수거채집여산법처리분개독립운행；채용FPGA정태국부중구기술，실현료불동자계통적공능배치；채용개관동태절환기술，실현료신호채집적령활배치화소형화설계。연건가구상，계통채용모괴화설계사로，실현료불동공작모식지간적절환。실험표명해계통구비흔강적수거채집여해산능력。
In order to achieve the design of data collecting system in real-time, universal and miniaturization, this paper introduc-es a design and implementation of a high-speed data collecting system based on IEEE-1394 Bus. In the hardware architecture, the IEEE-1394 Bus dedicated chips are used to achieve the high-speed data acquisition and reliability transmission. By using FP-GA+DSP data processing architecture, the data acquisition and processing algorithms run separately. By using the static partial re-configuration technology, different subsystem achieves specific functional configuration. By using switch technology, the circuits of analog signals implement flexible configuration and come in pattern design. In the software architecture, a modular design con-cept is used to the system design, and switching between different operating modes is realized. The system has the strong advan-tage of data collection and solver capabilities as illustrated in the experiment.
