软件
軟件
연건
SOFT WARE
2014年
5期
33-36
,共4页
冯超%汪金辉%万培元%侯立刚
馮超%汪金輝%萬培元%侯立剛
풍초%왕금휘%만배원%후립강
基准电压源%温度系数%基准电压
基準電壓源%溫度繫數%基準電壓
기준전압원%온도계수%기준전압
Bandgap%Temperature coefifcient%Voltage reference
基于0.35μm CSMC CMOS工艺设计并流片了一款典型的带隙基准电压源芯片,输出不随温度变化的高精度基准电压。电路包括核心电路、运放和启动电路三部分。芯片在3.3V供电电压,-40oC到80oC的温度范围内进行测试,结果显示输出电压波动范围为1.2128V~1.2175V,温度系数为32.2 ppm/oC。电路的版图面积为135μm×236μm,芯片大小为1 mm×1 mm。
基于0.35μm CSMC CMOS工藝設計併流片瞭一款典型的帶隙基準電壓源芯片,輸齣不隨溫度變化的高精度基準電壓。電路包括覈心電路、運放和啟動電路三部分。芯片在3.3V供電電壓,-40oC到80oC的溫度範圍內進行測試,結果顯示輸齣電壓波動範圍為1.2128V~1.2175V,溫度繫數為32.2 ppm/oC。電路的版圖麵積為135μm×236μm,芯片大小為1 mm×1 mm。
기우0.35μm CSMC CMOS공예설계병류편료일관전형적대극기준전압원심편,수출불수온도변화적고정도기준전압。전로포괄핵심전로、운방화계동전로삼부분。심편재3.3V공전전압,-40oC도80oC적온도범위내진행측시,결과현시수출전압파동범위위1.2128V~1.2175V,온도계수위32.2 ppm/oC。전로적판도면적위135μm×236μm,심편대소위1 mm×1 mm。
A typical bandgap voltage reference based on a 0.35 μm CSMC CMOS technology is designed and fabri-cated. The overall bandgap architecture is optimized to achieve high accuracy temperature independent voltage reference. The design consists of the bandgap core circuit,op-amp,and start-up circuit. The test results show that the bandgap reference circuit provides reference voltage from 1.2128V to 1.2175V with 3.3V power supply when temperature ranges from-40 oC to 80 oC,and the temperature coefifcient is 32.2 ppm/oC. The total layout area including dummy structures is 135 μm×236 μm,and the die area is 1 mm×1 mm.