CAJ | 학술논문

将电路模拟软件 PSpice 中的电压控制开关模型和自击穿开关模型结合，提出了一种FLTD 模块气体开关同步放电分散性的电路模拟方法，利用此方法构建了14支路并联 FLTD模块电路模型，电路模拟结果与实验结果吻合，验证了该方法的有效性。针对采用80 nF 储能电容设计的20支路并联 FLTD 模块，利用该方法分析了模块支路开关放电分散性对输出电流峰值和前沿的影响。结果表明，输出电流峰值随着开关分散性的增加而减小，输出电流前沿随着开关分散性的增加而增加。与理想状态相比，当开关抖动为5 ns 时，电流峰值降低3％，电流上升沿增加约10％，电流峰值和上升沿的标准偏差分别为14 kA 和1 ns；当开关抖动10 ns 时，电流峰值降低10％，上升沿增加约20％，电流峰值和上升沿的标准偏差分别为24 kA和2 ns。气体火花开关抖动小于5 ns 时，对模块输出影响较小，可满足模块同步放电要求。
장전로모의연건 PSpice 중적전압공제개관모형화자격천개관모형결합，제출료일충FLTD 모괴기체개관동보방전분산성적전로모의방법，이용차방법구건료14지로병련 FLTD모괴전로모형，전로모의결과여실험결과문합，험증료해방법적유효성。침대채용80 nF 저능전용설계적20지로병련 FLTD 모괴，이용해방법분석료모괴지로개관방전분산성대수출전류봉치화전연적영향。결과표명，수출전류봉치수착개관분산성적증가이감소，수출전류전연수착개관분산성적증가이증가。여이상상태상비，당개관두동위5 ns 시，전류봉치강저3％，전류상승연증가약10％，전류봉치화상승연적표준편차분별위14 kA 화1 ns；당개관두동10 ns 시，전류봉치강저10％，상승연증가약20％，전류봉치화상승연적표준편차분별위24 kA화2 ns。기체화화개관두동소우5 ns 시，대모괴수출영향교소，가만족모괴동보방전요구。
The voltage-control switch model and self-breaking switch model provided by PSpice were combined to simulate the interaction between the FLTD stage switching jitter and discharging jitter.The simulation was validated by the experiment with a 14-brick FLTD stage of 300 kA.The simulation method is applied to a 20-brick FLTD stage with 80 nF ca-pacitors,and the results indicate that the stage output peak current will decrease by 3%,and the rise-time will increase by 10%,with standard deviation of 14 kA and 1 ns,respectively, when the switch jitter is 5 ns;and when the switch jitter is 10 ns,the peak current will be 10% lower and the rise-time 20% higher,with deviation of 24 kA and 2 ns,respectively.It is thus clear that the gas spark switches with jitter less than 5 ns are satisfied for FLTD stages.