计算机技术与发展
計算機技術與髮展
계산궤기술여발전
COMPUTER TECHNOLOGY AND DEVELOPMENT
2014年
10期
51-54
,共4页
刘承禹%田泽%赵强%廖寅龙
劉承禹%田澤%趙彊%廖寅龍
류승우%전택%조강%료인룡
SoC%验证%验证平台
SoC%驗證%驗證平檯
SoC%험증%험증평태
System on Chip%verification%verification platform
多总线接口信号处理SoC芯片是以信号处理DSP为核心集成了多个总线接口的片上系统,该SoC涉及的总线协议众多,验证复杂、工作量大,验证将是该SoC芯片开发的瓶颈。为了缩短多总线接口信号处理SoC芯片的开发周期,提高该SoC芯片的一次流片成功率,必须采用更为可靠和有效的验证方案。以SoC验证流程及方法为指导,重点介绍了多总线接口信号处理SoC虚拟验证平台的构建和具体实施。验证结果表明,该验证平台能高效、全面验证芯片功能,提高了芯片验证效率,缩短了整个芯片开发周期,为芯片的成功投片提供了可靠保障。
多總線接口信號處理SoC芯片是以信號處理DSP為覈心集成瞭多箇總線接口的片上繫統,該SoC涉及的總線協議衆多,驗證複雜、工作量大,驗證將是該SoC芯片開髮的瓶頸。為瞭縮短多總線接口信號處理SoC芯片的開髮週期,提高該SoC芯片的一次流片成功率,必鬚採用更為可靠和有效的驗證方案。以SoC驗證流程及方法為指導,重點介紹瞭多總線接口信號處理SoC虛擬驗證平檯的構建和具體實施。驗證結果錶明,該驗證平檯能高效、全麵驗證芯片功能,提高瞭芯片驗證效率,縮短瞭整箇芯片開髮週期,為芯片的成功投片提供瞭可靠保障。
다총선접구신호처리SoC심편시이신호처리DSP위핵심집성료다개총선접구적편상계통,해SoC섭급적총선협의음다,험증복잡、공작량대,험증장시해SoC심편개발적병경。위료축단다총선접구신호처리SoC심편적개발주기,제고해SoC심편적일차류편성공솔,필수채용경위가고화유효적험증방안。이SoC험증류정급방법위지도,중점개소료다총선접구신호처리SoC허의험증평태적구건화구체실시。험증결과표명,해험증평태능고효、전면험증심편공능,제고료심편험증효솔,축단료정개심편개발주기,위심편적성공투편제공료가고보장。
Multibus interface signal processing SoC chip is a system on chip with DSP as the core integrating more bus interface. This SoC refers various bus protocol,being complex verification,and have much workload,verification will be the bottleneck of this SoC chip de-velopment. To shorten the development period of multibus interface signal processing SoC chip and increase the success rate of this SoC chip tape-out,must use more credible and effective verification scheme. Taking SoC verification procedure and method as the guidance, focus on the construction and implementation of virtual verification platform for multibus interface signal processing SoC. The verification result indicates this verification platform can efficiently and fully validate the logical function of the SoC chip,improving chip verification efficiency,shortening the whole chip development period,and provide credible guarantee for taping out successfully.