山东大学学报(工学版)
山東大學學報(工學版)
산동대학학보(공학판)
JOURNAL OF SHANDONG UNIVERSITY(ENGINEERING SCIENCE)
2014年
5期
7-13
,共7页
姬帅%张承瑞%孙书仁%胡天亮
姬帥%張承瑞%孫書仁%鬍天亮
희수%장승서%손서인%호천량
实时以太网%运动控制%通讯周期%同步%可编程逻辑门阵列
實時以太網%運動控製%通訊週期%同步%可編程邏輯門陣列
실시이태망%운동공제%통신주기%동보%가편정라집문진렬
real-time Ethernet%motion control%communication period%synchronization%field programmable gate array
为满足开放式数控系统的发展要求,开发了一种基于实时以太网Ethernet for Manufacture Automation Control (EtherMAC)开放式运动控制系统。EtherMAC主节点基于标准工业计算机,无需专用网卡和硬实时操作系统,从节点基于可编程逻辑门阵列(field programmable gate array,FPGA)硬件逻辑,不依赖专用芯片,从而在硬件结构上保证了系统的开放性。EtherMAC通过选取网络中第一个从节点管理网络的通讯周期和分布时钟,并利用以太网的巨大带宽将IPC强大运算能力和底层FPGA的硬实时特性高效地结合在一起,使系统主节点在软实时的操作系统支持下即可获得严格实时的通讯周期控制。实验结果表明,EtherMAC 可以在Windows CE系统上获得小于1 ms的通讯周期,并且其同步精度可以保证在100 ns范围内,满足多轴运动控制系统的实时同步需求。
為滿足開放式數控繫統的髮展要求,開髮瞭一種基于實時以太網Ethernet for Manufacture Automation Control (EtherMAC)開放式運動控製繫統。EtherMAC主節點基于標準工業計算機,無需專用網卡和硬實時操作繫統,從節點基于可編程邏輯門陣列(field programmable gate array,FPGA)硬件邏輯,不依賴專用芯片,從而在硬件結構上保證瞭繫統的開放性。EtherMAC通過選取網絡中第一箇從節點管理網絡的通訊週期和分佈時鐘,併利用以太網的巨大帶寬將IPC彊大運算能力和底層FPGA的硬實時特性高效地結閤在一起,使繫統主節點在軟實時的操作繫統支持下即可穫得嚴格實時的通訊週期控製。實驗結果錶明,EtherMAC 可以在Windows CE繫統上穫得小于1 ms的通訊週期,併且其同步精度可以保證在100 ns範圍內,滿足多軸運動控製繫統的實時同步需求。
위만족개방식수공계통적발전요구,개발료일충기우실시이태망Ethernet for Manufacture Automation Control (EtherMAC)개방식운동공제계통。EtherMAC주절점기우표준공업계산궤,무수전용망잡화경실시조작계통,종절점기우가편정라집문진렬(field programmable gate array,FPGA)경건라집,불의뢰전용심편,종이재경건결구상보증료계통적개방성。EtherMAC통과선취망락중제일개종절점관리망락적통신주기화분포시종,병이용이태망적거대대관장IPC강대운산능력화저층FPGA적경실시특성고효지결합재일기,사계통주절점재연실시적조작계통지지하즉가획득엄격실시적통신주기공제。실험결과표명,EtherMAC 가이재Windows CE계통상획득소우1 ms적통신주기,병차기동보정도가이보증재100 ns범위내,만족다축운동공제계통적실시동보수구。
A real-time Ethernet named EtherMAC (Ethernet for Manufacture Automation Control)was developped for open computer numerical control system.A standard industrial personal computer (IPC)based master node and field programmable gate array (FPGA)based slave nodes were employed in EtherMAC,as neither dedicated network inter-face card (NIC)nor application specific integrated circuit (ASIC)chips were mandatory,the system was open in hard-ware architecture.The computation ability of IPC and hard real-time property of FPGA were combined together with Ethernet in this way.By adopting the first slave node to manage the communication and distributed clock,time critical performance could be achieved even the master node only with soft real-time performance.Experimental results showed that communication period less than 1 ms and synchronization precision within 100 ns could be achieved by EtherMAC, which were enough for motion control systems demanded critical real-time and synchronization.