电脑知识与技术
電腦知識與技術
전뇌지식여기술
COMPUTER KNOWLEDGE AND TECHNOLOGY
2014年
29期
7000-7002
,共3页
划分SoC测试%扫描链平衡%二次排序组合
劃分SoC測試%掃描鏈平衡%二次排序組閤
화분SoC측시%소묘련평형%이차배서조합
SoC test%scan chain balance%two times reordering and combination
减少SoC的测试时间是降低测试成本的有效方法。提出一种二次排序组合的扫描链平衡算法以减少IP核测试时间。算法首先对内部扫描链按升序排列，然后对其进行mod n(封装后扫描链的条数)划分，得到n个余数序列，将余数为0的序列按降序排列，与其它余数序列组合成新的序列；对新序列再进行一次mod n划分，再次得到n个余数序列，最后对各余数序列分别求和，求和的结果即为n条扫描链封装后的扫描链长度。在ITC’02基准电路上的实验结果表明，该算法能有效地缩短IP核测试时间。
減少SoC的測試時間是降低測試成本的有效方法。提齣一種二次排序組閤的掃描鏈平衡算法以減少IP覈測試時間。算法首先對內部掃描鏈按升序排列，然後對其進行mod n(封裝後掃描鏈的條數)劃分，得到n箇餘數序列，將餘數為0的序列按降序排列，與其它餘數序列組閤成新的序列；對新序列再進行一次mod n劃分，再次得到n箇餘數序列，最後對各餘數序列分彆求和，求和的結果即為n條掃描鏈封裝後的掃描鏈長度。在ITC’02基準電路上的實驗結果錶明，該算法能有效地縮短IP覈測試時間。
감소SoC적측시시간시강저측시성본적유효방법。제출일충이차배서조합적소묘련평형산법이감소IP핵측시시간。산법수선대내부소묘련안승서배렬，연후대기진행mod n(봉장후소묘련적조수)화분，득도n개여수서렬，장여수위0적서렬안강서배렬，여기타여수서렬조합성신적서렬；대신서렬재진행일차mod n화분，재차득도n개여수서렬，최후대각여수서렬분별구화，구화적결과즉위n조소묘련봉장후적소묘련장도。재ITC’02기준전로상적실험결과표명，해산법능유효지축단IP핵측시시간。
Reducing SoC test time is an effective way to reduce testing costs.This paper proposes a scan chain balance algorithm based on two times reordering and combination for minimizing IP testing time. Firstly, the internal scan chains in ascending or-der, then its mod n (the number of packaged scan chain) division, get the n remainder sequence, the remainder of the sequence 0, in descending order, and other than a few sequences combined into a new sequence;once again for the new sequence mod n is divided to obtain a sequence of residues n again, and finally the remainder of the respective sequences are summed, the result is the sum of the length n of the scan chain after scan chains package.Experimental results on ITC' 02 benchmark circuits show that the method can effectively reduce the test time.
