CAJ | 학술논문

基于不断发展的系统级封装技术，提出了一种用于芯片间高速互连的新型可集成的物理器件：硅基毫米波介质填充波导。文中阐述了该器件的物理原理，采用建模、仿真相结合的方法对该模块进行了结构设计，利用新的设计思路结合半导体工艺解决了毫米波互连结构内部的反射、电压驻波比（VSWR）、信号耦合、准TEM-TE-准TEM转换传输问题以及毫米波互连结构阵列中信号泄露的问题，并利用半导体与MEMS加工工艺加以实现。测试结果表明宽度为680μm的单通道矩形波导，-10 dB带宽为9.8 GHz，相对带宽为12.56%；传输损耗为1 dB/cm，工作频带内相邻波导之间串扰低于-40 dB，可以形成大阵列并进行集成，从而实现芯片间数据的并行传输。
기우불단발전적계통급봉장기술，제출료일충용우심편간고속호련적신형가집성적물리기건：규기호미파개질전충파도。문중천술료해기건적물리원리，채용건모、방진상결합적방법대해모괴진행료결구설계，이용신적설계사로결합반도체공예해결료호미파호련결구내부적반사、전압주파비（VSWR）、신호우합、준TEM-TE-준TEM전환전수문제이급호미파호련결구진렬중신호설로적문제，병이용반도체여MEMS가공공예가이실현。측시결과표명관도위680μm적단통도구형파도，-10 dB대관위9.8 GHz，상대대관위12.56%；전수손모위1 dB/cm，공작빈대내상린파도지간천우저우-40 dB，가이형성대진렬병진행집성，종이실현심편간수거적병행전수。
With the boost of system-in-package(SiP)technology,a brand new physical component for chip-to-chip high-speed interconnection is proposed in this paper. The physical principle is described. The method to combine the modeling with simulation was used to design the structure of the module. In combination with the semiconductor technology,the new design method is utilized to solved the problems of reflection inside millimeter wave interconnection structure,VSWR(voltage standing wave ratio),signal coupling,quasi TEM-TE-quasi TEM transition and signal leakage in millimeter wave interconnection struc-ture array. The state-of-art planar semiconductor process and MEMS process are applied to the implementation of the component. The testing result indicates the single channel rectangular waveguide with width of 680 um has -10 dB bandwidth at 9.8 GHz, the relative bandwidth is 12.56%,transmission loss is 1dB/cm,and the crosstalk between adjacent channels is below -40 dB. The silicon filled rectangular waveguides are able to be integrated into big array to realize the high bandwidth parallel communi-cation from chip to chip.