CAJ | 학술논문

针对有源对消隐身要求的系统延时短、反应速度快、信号参数测量和对消波幅相控制精度高的特点，设计了一个基于相控阵技术、数字射频存储器（DRFM）和现场可编程门阵列（FPGA ）的有源对消系统。为了解决目标雷达散射截面计算量太大、不能有流水线延迟和难以实现实时计算等问题，采用离线计算的方法，预先建立目标的全向雷达散射截面（RCS）数据库、杂波数据库和噪声数据库，由 FPGA 根据测得的雷达信号参数在数据库中查找到相应的目标回波数据，实时调整对消波的幅度和相位，使对方的雷达接收机始终处于合成方向图的零点。最后通过仿真计算验证了该设计方案的有效性。
침대유원대소은신요구적계통연시단、반응속도쾌、신호삼수측량화대소파폭상공제정도고적특점，설계료일개기우상공진기술、수자사빈존저기（DRFM）화현장가편정문진렬（FPGA ）적유원대소계통。위료해결목표뢰체산사절면계산량태대、불능유류수선연지화난이실현실시계산등문제，채용리선계산적방법，예선건립목표적전향뢰체산사절면（RCS）수거고、잡파수거고화조성수거고，유 FPGA 근거측득적뢰체신호삼수재수거고중사조도상응적목표회파수거，실시조정대소파적폭도화상위，사대방적뢰체접수궤시종처우합성방향도적영점。최후통과방진계산험증료해설계방안적유효성。
According to system active cancellation stealth requirements of short delay time , fast reaction speed, high accuracy signal parameter measurement and cancellation of amplitude-phase control,an active cancellation system was designed based on phased array technique, digital radio frequency memory ( DRFM ) and field programmable gate array ( FPGA ).Using off-line calculation methods, which establish goals of omni-directional radar cross section ( RCS ) database, clutter and noise database in advance, to solve the problems that target RCS computation amount is too large, and it is difficult to realize real time computation. according to t radar signal parameters in the database, FPGA can find the corresponding target echo data, and real-time adjustment of wave signal's amplitude and phase are realized, so that the radar receiver is always in the direction of zero synthesis. Finally, simulation results show the validity of the design scheme.