CAJ | 학술논문

现阶段导航接收机设计的基本架构是FPGA＋DSP或者FPGA＋ ARM 的工作方式。接收机存在研发时间长，研发难度较大的特点，且DSP/ARM 处理环路跟踪的同时需处理协议上的许多操作，在实现上较为复杂，实时性不高。基于SOC技术，利用Xilinx公司提供的协处理器软核代替DSP部分功能，用于在单片FPGA内实现导航接收机的跟踪环路，并根据实际情况，设计了硬件加速器和相关值预处理模块，利用时分复用的方式节约了硬件资源，在单片FPGA上实现了跟踪环路的设计，降低了硬件成本，为高性能导航接收机芯片设计提供了一种思路。
현계단도항접수궤설계적기본가구시FPGA＋DSP혹자FPGA＋ ARM 적공작방식。접수궤존재연발시간장，연발난도교대적특점，차DSP/ARM 처리배로근종적동시수처리협의상적허다조작，재실현상교위복잡，실시성불고。기우SOC기술，이용Xilinx공사제공적협처리기연핵대체DSP부분공능，용우재단편FPGA내실현도항접수궤적근종배로，병근거실제정황，설계료경건가속기화상관치예처리모괴，이용시분복용적방식절약료경건자원，재단편FPGA상실현료근종배로적설계，강저료경건성본，위고성능도항접수궤심편설계제공료일충사로。
Nowadays the structure of Navigation Receiver is FPGA + DSP or FPGA +ARM .Usually ,it takes a lot of time and hardworking to realize it .And DSP/ARM needs to deal with many works in the agreement ,and control the tracking loop is designed .It is hard to realize it .Based on SOC ,a kind of tracking channel is designed .In this loop ,the micro-processor provided by Xilinx is used to replace part work in DSP/ARM .The tracking chan-nel in a signal FPGA is realized .Actually ,hardware arithmetic accelerator FPGA and corre-lation data preprocessing is designed ,using time division multiplexing technology to reduce cost of hardware .It provides a good idea in navigation receiver designing .