CAJ | 학술논문

设计了一款用于小型化铷原子钟锁相倍频器的窄带VCO(压控振荡器)电路。振荡电路采用了稳定性好的克拉泼电路方案。应用仿真软件对该电路进行仿真分析和优化设计。最终设计出的VCO电路主要性能指标为：输出频率范围为440 MHz~470 MHz，频率调谐灵敏度为18 MHz/V，二次谐波抑制度为-15 dBc，由其构成的锁相倍频器实现了低相噪设计要求，使小型化铷原子钟具备了实现高的频率稳定度潜力。
설계료일관용우소형화여원자종쇄상배빈기적착대VCO(압공진탕기)전로。진탕전로채용료은정성호적극랍발전로방안。응용방진연건대해전로진행방진분석화우화설계。최종설계출적VCO전로주요성능지표위：수출빈솔범위위440 MHz~470 MHz，빈솔조해령민도위18 MHz/V，이차해파억제도위-15 dBc，유기구성적쇄상배빈기실현료저상조설계요구，사소형화여원자종구비료실현고적빈솔은정도잠력。
A narrow-band voltage controlled oscillator (VCO) circuit for phase-locked frequency multiplier in rubidium atomic clock was designed. A clapp oscillation circuit scheme was used in the design. The design of the VCO was analyzed and optimized by simulation. A true VCO circuit was constructed and tested. The performance specifications of VCO were as following: frequency covering 440~470 MHz, tuning sensitivity 18 MHz/V and second harmonic suppression -15 dBc. The phase-locked frequency multiplication system was found to have a low phase noise meeting the requirement of the miniature rubidium atomic clocks.