CAJ | 학술논문

介绍一种基于 gm/ID参数特性的模拟电路优化设计方法，并以 CMOS两级运算放大器的设计为例具体阐述该方法的基本设计步骤和与传统设计方法相比的优势。该方法以晶体管的跨导和漏电流的比值 gm/ID与反型系数 IC的特性曲线作为设计参量来对电路进行设计。基于 gm/ID的设计方法对晶体管工作在所有的工作区域均有效。实验仿真结果很好地验证了 gm/ID设计方法的有效性。
개소일충기우 gm/ID삼수특성적모의전로우화설계방법，병이 CMOS량급운산방대기적설계위례구체천술해방법적기본설계보취화여전통설계방법상비적우세。해방법이정체관적과도화루전류적비치 gm/ID여반형계수 IC적특성곡선작위설계삼량래대전로진행설계。기우 gm/ID적설계방법대정체관공작재소유적공작구역균유효。실험방진결과흔호지험증료 gm/ID설계방법적유효성。
This paper describes a transistor optimization methodology for analog integrated CMOS circuit based on the gm/ID parameter characteristic of transistor. This methodology dependents on curve of gm/ID and IC in all operations regions. This curve is continuous in all regions of operation. By an example, we show the results obtained from the design of a two-stage-CMOS op amp. Experimental results are presented, in order to validate the methodology.