现代电子技术
現代電子技術
현대전자기술
MODERN ELECTRONICS TECHNIQUE
2013年
7期
54-56
,共3页
并行直接数字频率合成%宽带%杂波抑制%分辨力
併行直接數字頻率閤成%寬帶%雜波抑製%分辨力
병행직접수자빈솔합성%관대%잡파억제%분변력
parallel direct digital synthesis%broadband%clutter suppression%resolution
输出频带过窄是限制直接数字频率合成(DDS)发展的瓶颈之一.提出了多路并行DDS原理并且给出了具体案例,设计实现了输出频率在400~700 MHz范围内杂波抑制优于50 dBc,频率分辨力小于0.5 Hz,且便于后续实现各种调制.该DDS电路同时具有接口简单,使用灵活等优点,可用于在雷达、电子战领域的宽带细分辨力信号产生.
輸齣頻帶過窄是限製直接數字頻率閤成(DDS)髮展的瓶頸之一.提齣瞭多路併行DDS原理併且給齣瞭具體案例,設計實現瞭輸齣頻率在400~700 MHz範圍內雜波抑製優于50 dBc,頻率分辨力小于0.5 Hz,且便于後續實現各種調製.該DDS電路同時具有接口簡單,使用靈活等優點,可用于在雷達、電子戰領域的寬帶細分辨力信號產生.
수출빈대과착시한제직접수자빈솔합성(DDS)발전적병경지일.제출료다로병행DDS원리병차급출료구체안례,설계실현료수출빈솔재400~700 MHz범위내잡파억제우우50 dBc,빈솔분변력소우0.5 Hz,차편우후속실현각충조제.해DDS전로동시구유접구간단,사용령활등우점,가용우재뢰체、전자전영역적관대세분변력신호산생.
Narrow output frequency band is one of the key factors to restrict DDS′s application. This paper provided the principle of multi?channel parallel direct digital synthesis and its application,In this design,when the output signal frequency covers 400~700 MHz,the clutter suppression is above 50 dBc and the frequency resolution is below 0.5 Hz. It is easy to modu?late anytime. The circuit has the advantages of simple interface,and flexible use,and it can be used in broadband and high fre?quency resolution signal production field such as radar and electronic warfare.
