CAJ | 학술논문

针对SRAM(Static Random Access Memory)型FPGA单粒子翻转引起软错误的问题,该文分析了单粒子单位翻转和多位翻转对布线资源的影响,提出了可以减缓软错误的物理设计方法.通过引入布线资源错误发生概率评价布线资源的软错误,并与故障传播概率结合计算系统失效率,驱动布局布线过程.实验结果表明,该方法在不增加额外资源的情况下,可以降低系统软错误率约18%,还可以有效减缓多位翻转对系统的影响.
침대SRAM(Static Random Access Memory)형FPGA단입자번전인기연착오적문제,해문분석료단입자단위번전화다위번전대포선자원적영향,제출료가이감완연착오적물리설계방법.통과인입포선자원착오발생개솔평개포선자원적연착오,병여고장전파개솔결합계산계통실효솔,구동포국포선과정.실험결과표명,해방법재불증가액외자원적정황하,가이강저계통연착오솔약18%,환가이유효감완다위번전대계통적영향.
@@@@To solve the problem of soft error caused by Single Event Upset (SEU) in Static Random Access Memory (SRAM)-based Field Programmable Gate Arrays (FPGAs), the impact of routing resources by Single Bit Upset (SBU) and Multiple Bit Upset (MBU) is analyzed. A new method of soft-error-mitigation physical design approach is presented. In the approach, the error probability of routing resources is introduced for evaluation soft error. Combined with error propagation probability, system failure rate is calculated for driving placement and routing. The experimental results show that the system failure rate decreases about 18% using proposed method. This method can also effectively mitigate effect of multiple bit upset.