CAJ | 학술논문

针对高压断路器相控开断短路电流,设计了基于可编程逻辑器件 FPGA 和数字信号处理器 DSP 的断路器智能控制装置.该装置采用 FPGA 完成遵循 IEC61850-9-2LE 协议的采样值报文实时接收和硬件解码,通过时钟同步技术减少采样值报文网络传输延时对短路电流相控开断性能的影响.对接收的采样值信号,应用自适应数据窗 LMS 算法实现短路电流特征参数快速提取,基于 Pade 逼近实现故障电流趋势的准确预测,采用二分法搜索有效零点获取最佳开断区间.建立测试平台对智能装置和算法进行验证,结果表明,设计的装置能实时准确地预测短路电流最佳开断点,为相控开断短路电流提供保障.
침대고압단로기상공개단단로전류,설계료기우가편정라집기건 FPGA 화수자신호처리기 DSP 적단로기지능공제장치.해장치채용 FPGA 완성준순 IEC61850-9-2LE 협의적채양치보문실시접수화경건해마,통과시종동보기술감소채양치보문망락전수연시대단로전류상공개단성능적영향.대접수적채양치신호,응용자괄응수거창 LMS 산법실현단로전류특정삼수쾌속제취,기우 Pade 핍근실현고장전류추세적준학예측,채용이분법수색유효영점획취최가개단구간.건립측시평태대지능장치화산법진행험증,결과표명,설계적장치능실시준학지예측단로전류최가개단점,위상공개단단로전류제공보장.
An intelligent control device is developed based on a field-programmable gate array (FPGA) and a digital signal processor (DSP) for the controlled interruption short circuit currents of high voltage circuit breakers. The sample value messages which meet with IEC 61850-9-2LE protocols are received and decoded by the FPGA, at the same time the synchronization method is used to reduce the effects of network transmit delay on the performance of controlled interruption short circuit currents. Then the parameters of short circuit currents are estimated and the current zeros are calculated based on the least mean squares (LMS) algorithm. The trend of the fault current is forecasted based on Pade approximation,effective zero is searched by dichotomy to obtain the best interruption interval. Finally, a test platform is set up to verify the performance of the controller and the algorithms. Testing results show that the device is able to quickly finish the best interruption point prediction of short circuit currents and provide protection for the controlled interruption short circuit currents.