CAJ | 학술논문

在考虑了电导率调制效应的情况下对深亚微米静电放电(electrostatic discharge, ESD)保护器件的衬底电阻流控电压源模型进行优化,并根据轻掺杂体衬底和重掺杂外延型衬底的不同物理机制提出了可根据版图尺寸调整的精简衬底电阻宏模型,所建模型准确地预估了不同衬底结构上源极扩散到衬底接触扩散间距变化对触发电压Vt1的影响.栅接地n型金属氧化物半导体器件的击穿特性结果表明,所提出的衬底电阻模型与实验结果符合良好,且仿真时间仅为器件仿真软件的7%,为ESD保护器件版图优化设计提供了方法支持.
재고필료전도솔조제효응적정황하대심아미미정전방전(electrostatic discharge, ESD)보호기건적츤저전조류공전압원모형진행우화,병근거경참잡체츤저화중참잡외연형츤저적불동물리궤제제출료가근거판도척촌조정적정간츤저전조굉모형,소건모형준학지예고료불동츤저결구상원겁확산도츤저접촉확산간거변화대촉발전압Vt1적영향.책접지n형금속양화물반도체기건적격천특성결과표명,소제출적츤저전조모형여실험결과부합량호,차방진시간부위기건방진연건적7%,위ESD보호기건판도우화설계제공료방법지지.
The current controlled voltage source model of substrate parasitic resistance of deep sub-micron electrostatic discharge protection device is optimized by considering the effect of conductance modulation. A compact macro-model of substrate resistance is presented according to the characteristics of lightly doped bulk substrate and heavily doped substrate with a lightly doped epitaxial layer, which is scalable with the layout dimension. The experimental model parameters of devices with various spaces between source and substrate diffusion can be extracted by device simulation. The breakdown behavior of gate grounded negative-channel metal oxide semiconduc-tor shows the effectiveness of this method. In the meantime, the simulation time-consuming of the compact model is only 7%that of the device simulation software.