CAJ | 학술논문

可逆逻辑是量子计算的基本特征，也是日益突出的低能耗需求的一种解决方案。根据可逆电路的可控制性和可观测性，论文提出了一种基于逻辑可满足性的算法来自动产生单门失效错误的完备检测集。基于k-NOT门的可逆逻辑线路中的数据传输进行线性建模，用线性时态逻辑描述单门失效错误约束，运用SAT求解器寻求反例的方法自动生成可逆电路的错误检测集。实验结果显示，本方法能够有效的应用于不规则和复杂的基于k-NOT门的可逆逻辑线路，自动化程度高。
가역라집시양자계산적기본특정，야시일익돌출적저능모수구적일충해결방안。근거가역전로적가공제성화가관측성，논문제출료일충기우라집가만족성적산법래자동산생단문실효착오적완비검측집。기우k-NOT문적가역라집선로중적수거전수진행선성건모，용선성시태라집묘술단문실효착오약속，운용SAT구해기심구반례적방법자동생성가역전로적착오검측집。실험결과현시，본방법능구유효적응용우불규칙화복잡적기우k-NOT문적가역라집선로，자동화정도고。
Reversible logic is the basic feature of quantum computing, and is also a solution to the increasingly prominent low energy demand. According to the controllability and observability of reversible circuits, this pa?per presents a novel algorithm which is based on the logic satisfiability to generate the complete test set automati?cally for single missing-gate fault in reversible circuits. The data transmissions of reversible logic circuits based on k-NOT gates are linear modeled, and the constraint of single missing-gate faults are described by linear tem?poral logic. The test sets are generated automatically by applying the circuit models and the fault constraints to the SAT solver to obtain the counterexample. Experimental results show that this method can generate test set effec?tively with high degree of automation for irregular and complex reversible logic circuit based on k-NOT gates.