CAJ | 학술논문

为了应对集成电路老化对电子系统可靠性带来的威胁，提出一种应用关键路径漏电流变化进行负偏置温度不稳定性老化预测的方法。首先用被测芯片在一组测量向量敏化下的漏电流变化构成一个方程组，通过解方程组得到关键路径门电路的漏电流变化；然后通过漏电流变化与时延变化的关联模型，将漏电流变化转换得到门电路延迟变化；最后通过关键路径延迟变化来预测电路老化。对实验电路的仿真结果表明，该方法可用来预测负偏置温度不稳定性引起的电路老化，并且可通过增加测量时间来避免工艺偏差对预测精度的影响。
위료응대집성전로노화대전자계통가고성대래적위협，제출일충응용관건로경루전류변화진행부편치온도불은정성노화예측적방법。수선용피측심편재일조측량향량민화하적루전류변화구성일개방정조，통과해방정조득도관건로경문전로적루전류변화；연후통과루전류변화여시연변화적관련모형，장루전류변화전환득도문전로연지변화；최후통과관건로경연지변화래예측전로노화。대실험전로적방진결과표명，해방법가용래예측부편치온도불은정성인기적전로노화，병차가통과증가측량시간래피면공예편차대예측정도적영향。
Negative bias temperature instability (NBTI) has become a serious concern for the lifetime reliability of integrated circuits. In this paper, we propose to use the isolated leakage change in critical paths from full-chip leakage measurement result to predict NBTI-induced circuit aging. The chip-level leakage change under a set of measurement vectors are firstly formulated as an equation set. Solving this equation set can obtain leakage change in the gates along the critical paths. Then, we predict delay degradation on arbitrary critical path based on the re-lationship between leakage change and delay increase. Experimental results demonstrated that our scheme can effectively predict NBTI-induced circuit aging with acceptable accuracy loss. The accuracy loss induced by proc-ess variation can be avoided through increasing measurement time.