电子与信息学报
電子與信息學報
전자여신식학보
JOURNAL OF ELECTRONICS & INFORMATION TECHNOLOGY
2015年
2期
468-476
,共9页
喻伟%杨海钢%刘洋%黄娟%蔡博睿%陈锐
喻偉%楊海鋼%劉洋%黃娟%蔡博睿%陳銳
유위%양해강%류양%황연%채박예%진예
集成电路%统计静态时序分析%空间关联%非高斯非线性%工艺偏差%延时模型
集成電路%統計靜態時序分析%空間關聯%非高斯非線性%工藝偏差%延時模型
집성전로%통계정태시서분석%공간관련%비고사비선성%공예편차%연시모형
Integrated Circuit (IC)%Statistical Static Timing Analysis (SSTA)%Spatial correlations%Non- gaussianity and non-linearity%Process variations%Delay model
为了准确评估工艺参数偏差对电路延时的影响,该文提出一种考虑空间关联工艺偏差的统计静态时序分析方法。该方法采用一种考虑非高斯分布工艺参数的二阶延时模型,通过引入临时变量,将2维非线性模型降阶为1维线性模型;再通过计算到达时间的紧密度概率、均值、二阶矩、方差及敏感度系数,完成了非线性非高斯延时表达式的求和、求极大值操作。经ISCAS89电路集测试表明,与蒙特卡洛仿真(MC)相比,该方法对应延时分布的均值、标准差、5%延时点及95%延时点的平均相对误差分别为0.81%,-0.72%,2.23%及-0.05%,而运行时间仅为蒙特卡洛仿真的0.21%,证明该方法具有较高的准确度和较快的运行速度。
為瞭準確評估工藝參數偏差對電路延時的影響,該文提齣一種攷慮空間關聯工藝偏差的統計靜態時序分析方法。該方法採用一種攷慮非高斯分佈工藝參數的二階延時模型,通過引入臨時變量,將2維非線性模型降階為1維線性模型;再通過計算到達時間的緊密度概率、均值、二階矩、方差及敏感度繫數,完成瞭非線性非高斯延時錶達式的求和、求極大值操作。經ISCAS89電路集測試錶明,與矇特卡洛倣真(MC)相比,該方法對應延時分佈的均值、標準差、5%延時點及95%延時點的平均相對誤差分彆為0.81%,-0.72%,2.23%及-0.05%,而運行時間僅為矇特卡洛倣真的0.21%,證明該方法具有較高的準確度和較快的運行速度。
위료준학평고공예삼수편차대전로연시적영향,해문제출일충고필공간관련공예편차적통계정태시서분석방법。해방법채용일충고필비고사분포공예삼수적이계연시모형,통과인입림시변량,장2유비선성모형강계위1유선성모형;재통과계산도체시간적긴밀도개솔、균치、이계구、방차급민감도계수,완성료비선성비고사연시표체식적구화、구겁대치조작。경ISCAS89전로집측시표명,여몽특잡락방진(MC)상비,해방법대응연시분포적균치、표준차、5%연시점급95%연시점적평균상대오차분별위0.81%,-0.72%,2.23%급-0.05%,이운행시간부위몽특잡락방진적0.21%,증명해방법구유교고적준학도화교쾌적운행속도。
To evaluate effects of process variations on circuit delay accurately, this study proposes a Statistical Static Timing Analysis (SSTA) which incorporates process variations with spatial correlations. The algorithm applies a second order delay model that taking into account the non-Gaussian parameters - by inducting the notion of ‘conditional variables’, the 2D non-linear delay model is translated into 1D linear one; and by computing the tightness probability, mean, variance, second-order moment and sensitivity coefficients of the circuit arrival time, the sum and max operations of non-linear and non-Gaussian delay expressions are implemented. For the ISCAS89 benchmark circuits, as compared to Monte Carlo (MC) simulation, the average errors of 0.81%,-0.72%, 2.23% and-0.05%, in the mean, variance, 5% and 95% quantile points of the circuit delay are obtained respectively for the proposed method. The runtime of the proposed method is about 0.21% of the value of Monte Carlo simulation. The experimental results prove that the high accuracy of the SSTA is reliable.