CAJ | 학술논문

为了在QPSK数字调制系统中恢复QPSK的载波同步信号，以确保接收机能够接收到无失真的数据，在对QPSK调制理论阐述后提出基于DDS的平方环直接提取载波的方法，分析了电路中各个部分的作用和功能，用Matlab软件进行仿真实验，对锁相环提取的载波信号进行分析，在锁相环性能良好的前提下，实现了载波信号的提取。利用Verilog HDL语言对硬件电路进行行为级描述，综合出RTL级电路。
위료재QPSK수자조제계통중회복QPSK적재파동보신호，이학보접수궤능구접수도무실진적수거，재대QPSK조제이론천술후제출기우DDS적평방배직접제취재파적방법，분석료전로중각개부분적작용화공능，용Matlab연건진행방진실험，대쇄상배제취적재파신호진행분석，재쇄상배성능량호적전제하，실현료재파신호적제취。이용Verilog HDL어언대경건전로진행행위급묘술，종합출RTL급전로。
In order to restore the QPSK Carrier synchronization signals in the QPSK digital modulation system and ensure that the receiver can receive data without distortion,QPSK modulation theory is described and the DDS?based method that the carrier is directly extracted by the square ring is proposed. The role and function of each part of the circuit are analyzed. Matlab software was used in the simulation experiment to analysis the carrier signal extracted by phase?locked loop. In a premise to maintain good performance of the phase?locked loop,the extraction of the carrier signal was achieved. The behavioral level de?scription of hardware circuits is performed with Verilog HDL. The RTL?level circuit was obtained by synthetical method.