CAJ | 학술논문

现代高能物理实验中，对时钟系统有着精度和稳定性的要求。高速串行通信技术，因其能够在进行数据传输的同时进行时钟数据恢复而得到广泛应用。针对因此带来的恢复时钟相位不确定性，设计了一种基于串并转换技术和FPGA的时钟同步方法，能够为高能物理实验多节点时钟系统提供精确相位同步的时钟。该方法利用FPGA内部硬件资源对恢复时钟进行处理，串并转换芯片自带的状态位和优秀的串并转换能力极大地简化了系统设计，并增强了系统性能。
현대고능물리실험중，대시종계통유착정도화은정성적요구。고속천행통신기술，인기능구재진행수거전수적동시진행시종수거회복이득도엄범응용。침대인차대래적회복시종상위불학정성，설계료일충기우천병전환기술화FPGA적시종동보방법，능구위고능물리실험다절점시종계통제공정학상위동보적시종。해방법이용FPGA내부경건자원대회복시종진행처리，천병전환심편자대적상태위화우수적천병전환능력겁대지간화료계통설계，병증강료계통성능。
Modern High-energy physics experiments required precise and stable clock signal .High-speed ser-ial communication technology had been applied widely because it can transmit data and recovery clock at the same time.But it will lead to recovered clock phase uncertainty .This paper designs a precise clock synchroni-zation method based on serial parallel conversion technology and FPGA and can offer high precise clock for High-energy physics experiments .The method uses hardware resource of FPGA to process recovered clock , status bit and excellent performance of Serdes chip greatly simplifies system design and enhance system performance .