电子元件与材料
電子元件與材料
전자원건여재료
ELECTRONIC COMPONENTS & MATERIALS
2015年
2期
47-49,61
,共4页
功率器件%垂直双扩散场效应管%元胞设计%导通电阻%版图%流片
功率器件%垂直雙擴散場效應管%元胞設計%導通電阻%版圖%流片
공솔기건%수직쌍확산장효응관%원포설계%도통전조%판도%류편
power device%VDMOS%cell design%on-resistance%layout%tape-out
基于Sentaurus TCAD仿真软件，在外延层参数与生产工艺确定的情况下，通过调整元胞的多晶硅长度优化特征导通电阻，并通过对版图元胞面积的准确计算，设计了三款导通电阻目标值为2.4，3.0和3.3Ω的高压功率VDMOS芯片。流片结果显示，导通电阻的平均值与版图计算值吻合度均超过96%，表明了该设计方法、仿真参数及版图设计具有较高的可靠性。
基于Sentaurus TCAD倣真軟件，在外延層參數與生產工藝確定的情況下，通過調整元胞的多晶硅長度優化特徵導通電阻，併通過對版圖元胞麵積的準確計算，設計瞭三款導通電阻目標值為2.4，3.0和3.3Ω的高壓功率VDMOS芯片。流片結果顯示，導通電阻的平均值與版圖計算值吻閤度均超過96%，錶明瞭該設計方法、倣真參數及版圖設計具有較高的可靠性。
기우Sentaurus TCAD방진연건，재외연층삼수여생산공예학정적정황하，통과조정원포적다정규장도우화특정도통전조，병통과대판도원포면적적준학계산，설계료삼관도통전조목표치위2.4，3.0화3.3Ω적고압공솔VDMOS심편。류편결과현시，도통전조적평균치여판도계산치문합도균초과96%，표명료해설계방법、방진삼수급판도설계구유교고적가고성。
Based on Sentaurus TCAD simulation software, under the situation of certained epitaxial layer parameters and production process, the specific on-resistance (Ron,sp) was optimized by the way of modulating the poly silicon length of the cell. And according to precise calculations about the cell area of layout, three high voltage power VDMOS chips with different Ron target values:2.4, 3.0 and 3.3Ω, were designed. The tape-out results show that the average Ron values fit the layout calculation values more than 96%, which performs that design methods, simulation parameters and the layout design possess high reliability.
