电子设计工程
電子設計工程
전자설계공정
ELECTRONIC DESIGN ENGINEERING
2015年
1期
134-136
,共3页
王海滨%刘宝华%解传军%孔挺
王海濱%劉寶華%解傳軍%孔挺
왕해빈%류보화%해전군%공정
模拟器%FPGA%USB2.0%Slave FIFO
模擬器%FPGA%USB2.0%Slave FIFO
모의기%FPGA%USB2.0%Slave FIFO
simulator%FPGA%USB2.0%Slave FIFO
在模拟器的设计中，为了使数据能够快速有效地在模拟器的各个模块之间进行高速传递，提出了一种同步Slave FIFO模式高速USB数据传输设计方法，并完成了系统的软硬件设计。系统以FPGA作为核心逻辑控制单元，优化设计有限状态机实现同步Slave FIFO接口协议，设计了芯片固件程序，实现系统在线自动升级加载功能。实际测试表明，本系统数据传输能力平均可达40 MB/s，本系统设计可扩展性好，易于修改和移植，能降低模拟器成本。
在模擬器的設計中，為瞭使數據能夠快速有效地在模擬器的各箇模塊之間進行高速傳遞，提齣瞭一種同步Slave FIFO模式高速USB數據傳輸設計方法，併完成瞭繫統的軟硬件設計。繫統以FPGA作為覈心邏輯控製單元，優化設計有限狀態機實現同步Slave FIFO接口協議，設計瞭芯片固件程序，實現繫統在線自動升級加載功能。實際測試錶明，本繫統數據傳輸能力平均可達40 MB/s，本繫統設計可擴展性好，易于脩改和移植，能降低模擬器成本。
재모의기적설계중，위료사수거능구쾌속유효지재모의기적각개모괴지간진행고속전체，제출료일충동보Slave FIFO모식고속USB수거전수설계방법，병완성료계통적연경건설계。계통이FPGA작위핵심라집공제단원，우화설계유한상태궤실현동보Slave FIFO접구협의，설계료심편고건정서，실현계통재선자동승급가재공능。실제측시표명，본계통수거전수능력평균가체40 MB/s，본계통설계가확전성호，역우수개화이식，능강저모의기성본。
In the design of the simulator, in order to have the data conveyed quickly and efficiently among every model of the simulator, this article introduces a kind of high speed USB transport method, and finishes the hardware and software's design. The system uses FPGA as its control center, and designs optimized finite-state machine to realize synchronous slave FIFO protocol, at the same time chip firmware program is designed to ensure that the system software can be update on line without any manual operation. The test results show that the system can run at the average data transfer rate of up to 40MB/s, and this design which has strong expansibility can be changed and easy-to-port. Besides, it can cut down the cost of the simulator.
