CAJ | 학술논문

在传统电流求和模式带隙基准电压源的基础上进行改进，设计了一种简单的三阶曲率补偿带隙基准电压源。该基准源由启动电路、低压高增益两级运算放大器、基准核心电路和高阶曲率补偿电路组成。在低温段，通过PMOS管进行二阶补偿；在高温段，通过PTAT2电流进行三阶补偿。基于CSMC 0．35μm CMOS工艺，采用Cadence软件对设计电路进行仿真分析。结果表明，在－40～125℃温度范围内，5 V电源电压下，基准源输出电压为1．226V，输出电压变化范围为0．51mV，基准源的温度系数为2．5×10－6／℃，低频时的电源抑制比为－67 dB。
재전통전류구화모식대극기준전압원적기출상진행개진，설계료일충간단적삼계곡솔보상대극기준전압원。해기준원유계동전로、저압고증익량급운산방대기、기준핵심전로화고계곡솔보상전로조성。재저온단，통과PMOS관진행이계보상；재고온단，통과PTAT2전류진행삼계보상。기우CSMC 0．35μm CMOS공예，채용Cadence연건대설계전로진행방진분석。결과표명，재－40～125℃온도범위내，5 V전원전압하，기준원수출전압위1．226V，수출전압변화범위위0．51mV，기준원적온도계수위2．5×10－6／℃，저빈시적전원억제비위－67 dB。
A simple third‐order curvature compensated bandgap voltage reference is designed through improving the traditional bandgap reference with current summing mode .It consists of starting cir‐cuit ,two‐stage operational amplifier with low voltage and high gain ,core circuit and high‐order cur‐vature compensation circuit .The second‐order curvature compensation in low temperature section and the third‐order curvature compensation in high temperature section are provided by a PM OS transistor and a PTAT2 current , respectively . The reference circuit is simulated based on CSMC 0 .35 μm CMOS process by using Cadence software .Results show that ,at 5 V supply voltage ,the bandgap reference has an output voltage of 1 .226 V ,w hich only changes 0 .51 mV over a temperature range from -40 ℃ to 125 ℃ ,a temperature coefficient of 2 .5 × 10-6/℃ ,and a power supply rejection ratio of -67 dB at low frequency .